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Improve gate descriptions and legends (tomcl#419)
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* improve-n-gate-descriptions

* more gate description work

* final changes
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tomcl authored Sep 25, 2023
1 parent 4ed7d4b commit cc48bf7
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Showing 3 changed files with 49 additions and 21 deletions.
31 changes: 23 additions & 8 deletions src/Renderer/DrawBlock/Symbol.fs
Original file line number Diff line number Diff line change
Expand Up @@ -18,7 +18,7 @@ open BlockHelpers
module Constants =
[<Literal>]
let gridSize = 30
let mergeSplitTextSize = "12px"
let mergeSplitTextSize = "10px"
let busSelectTextSize = "12px"
let customPortSpacing = 40.
let portPosEdgeGap = 0.7
Expand All @@ -34,7 +34,7 @@ module Constants =
let labelFontSizeInPixels :float = 16 // other parameters scale correctly with this

/// Font size for legends (names) in custom components
let customLegendFontSizeInPixels: float = 16.
let customLegendFontSizeInPixels: float = 16

/// Font size for legends on otehr components
let otherLegendFontSizeInPixels: float = 14
Expand Down Expand Up @@ -278,7 +278,7 @@ let busTitleAndBits (t:string) (n:int) : string =
let nBitsGateTitle (gateType:string) (n:int) : string =
match n with
|1 -> gateType
|_ -> (string n) + "-bit " + gateType
|_ -> (string n) + "-bit." + gateType+ "-N"

///Insert titles for bus select
/// used once
Expand Down Expand Up @@ -333,10 +333,25 @@ let getGateComponentLegend gType =
| Or | Nor -> "≥1"
| Xor | Xnor -> "=1"


let getTextGateComponentLegend gType =
match gType with
| And -> "And"
| Or -> "Or"
| Xor -> "Xor"
| Nand -> "Nand"
| Nor -> "Nor"
| Xnor -> "Xnor"

let getGateNComponentLegend numInputs gType =
getTextGateComponentLegend gType
|> fun title -> nBitsGateTitle title numInputs


// Text to be put inside different Symbols depending on their ComponentType
let getComponentLegend (componentType:ComponentType) (rotation:Rotation) =
match componentType with
| GateN (gateType, _) -> getGateComponentLegend gateType
| GateN (gateType, numInputs) -> getGateComponentLegend gateType
| Not -> "1"
| Decode4 -> "Decode"
| NbitsAdder n | NbitsAdderNoCin n
Expand All @@ -353,11 +368,11 @@ let getComponentLegend (componentType:ComponentType) (rotation:Rotation) =
| DFFE -> "DFFE"
| Counter n |CounterNoEnable n
| CounterNoLoad n |CounterNoEnableLoad n -> busTitleAndBits "Counter" n
| NbitsXor (x, None)-> nBitsGateTitle "XOR" x
| NbitsXor (x, None)-> nBitsGateTitle "Xor" x
| NbitsXor (x, Some Multiply)-> nBitsGateTitle "Multiply" x
| NbitsOr (x)-> nBitsGateTitle "OR" x
| NbitsAnd (x)-> nBitsGateTitle "AND" x
| NbitsNot (x)-> nBitsGateTitle "NOT" x
| NbitsOr (x)-> nBitsGateTitle "Or" x
| NbitsAnd (x)-> nBitsGateTitle "And" x
| NbitsNot (x)-> nBitsGateTitle "Not" x
| Shift (n,_,_) -> busTitleAndBits "Shift" n
| Custom x -> x.Name.ToUpper()
| MergeN _ -> "Merge"
Expand Down
4 changes: 3 additions & 1 deletion src/Renderer/DrawBlock/SymbolView.fs
Original file line number Diff line number Diff line change
Expand Up @@ -53,7 +53,7 @@ let addStyledText (pos: XYPos) text name =
let addLegendText (pos: XYPos) (name:string) alignment weight size =
let textStyle =
{defaultText with TextAnchor = alignment; FontWeight = weight; FontSize = size}
let bottomTextStyle = {textStyle with FontWeight = Constants.bitIndicationFontWeight}
let bottomTextStyle = textStyle
match name.Split([|'.'|]) with
| [|oneLine|] ->
[makeText pos.X pos.Y name textStyle]
Expand Down Expand Up @@ -228,6 +228,8 @@ let drawComponent (symbol:Symbol) (theme:ThemeType) =
let W = float comp.W*(Option.defaultValue 1.0 symbol.HScale)
let transform = symbol.STransform

printfn "%s" $"Comp = {comp.Type}, H={H}, W= {W}"

let mergeSplitLine pos msb lsb =
let text =
match msb = lsb, msb >= lsb with
Expand Down
35 changes: 23 additions & 12 deletions src/Renderer/UI/SelectedComponentView.fs
Original file line number Diff line number Diff line change
Expand Up @@ -811,6 +811,15 @@ let private makeLsbBitNumberField model (comp:Component) dispatch =


let private makeDescription (comp:Component) model dispatch =
let gateDescription (numInputs: int) (gateType: GateComponentType) =
let gType = $"{gateType}"
let gTypeName = gType[0..0].ToUpper() + gType[1..gType.Length-1]
$"{numInputs} input {gTypeName} gate."

let gateNDescription (numInputs: int) (gateType: GateComponentType) =
let gType = $"{gateType}"
let gTypeName = gType[0..0].ToUpper() + gType[1..gType.Length-1]
$"{gTypeName}-N block. {numInputs} {gTypeName} gates used one for each bit of the {numInputs}-bit input and output busses."
match comp.Type with
| ROM _ | RAM _ | AsyncROM _ ->
failwithf "What? Legacy RAM component types should never occur"
Expand Down Expand Up @@ -843,8 +852,8 @@ let private makeDescription (comp:Component) model dispatch =
]
| Not ->
div [] [ str <| sprintf "%A gate." comp.Type ]
| GateN (gateType, _) ->
div [] [ str <| sprintf "%A gate." gateType ]
| GateN (gateType, n) ->
div [] [ str <| gateDescription n gateType ]
| Mux2 -> div [] [
str "Multiplexer with two inputs and one output."
br []
Expand All @@ -860,28 +869,30 @@ let private makeDescription (comp:Component) model dispatch =
| Demux2 -> div [] [ str "Demultiplexer with one input and two outputs." ]
| Demux4 -> div [] [ str "Demultiplexer with one input and four outputs." ]
| Demux8 -> div [] [ str "Demultiplexer with one input and eight outputs." ]
| MergeWires -> div [] [ str "Merge two wires of width n and m into a single wire of width n+m. \
| MergeWires -> div [] [ str "Merge two busses of width n and m into a single bus of width n+m. \
The bit numbers of the whole and each branch are shown when the component is connected." ]
| MergeN _ -> div [] [ str "Merge n wires of various widths into a single wire. \
| MergeN _ -> div [] [ str "Merge N busses of various widths into a single bus. \
The bit numbers of the whole and each branch are shown when the component is connected." ]
| SplitWire _ -> div [] [ str "Split a wire of width n+m into two wires of width n and m. \
| SplitWire _ -> div [] [ str "Split a bus of width n+m exactly into two non-overlapping busses of width n and m. \
The bit numbers of the whole and each branch are shown when the component is connected."]
| SplitN _ -> div [] [ str "Split a wire into n wires of various widths m. "]
| SplitN _ -> div [] [ str "Split a bus into N output busses of various widths. The output busses may overlap. \
The output busses need not include all of the input bits"]
| NbitsAdder numberOfBits
| NbitsAdderNoCin numberOfBits
| NbitsAdderNoCout numberOfBits
| NbitsAdderNoCinCout numberOfBits
-> div [] [ str <| sprintf "%d bit(s) adder." numberOfBits ]
| NbitsXor( numberOfBits, typ) ->
match typ with
| None -> $"{numberOfBits} XOR gates with {numberOfBits} outputs."
| Some Multiply -> $"{numberOfBits}X{numberOfBits}->{numberOfBits} Multiply block. this \
return sbits ({numberOfBits}:0) of the result. \
| None -> gateNDescription numberOfBits Xor
| Some Multiply -> $"{numberOfBits}X{numberOfBits}->{numberOfBits} Multiply block. This \
returns bits ({numberOfBits}:0) of the result. \
For these bits, signed and unsigned multiplication are identical"
|> (fun text -> div [] [str <| text])
| NbitsAnd numberOfBits -> div [] [ str <| sprintf "%d AND gates with %d outputs." numberOfBits numberOfBits]
| NbitsOr numberOfBits -> div [] [ str <| sprintf "%d OR gates with %d outputs." numberOfBits numberOfBits]
| NbitsNot numberOfBits -> div [] [ str <| sprintf "%d NOT gates with %d outputs." numberOfBits numberOfBits]
| NbitsAnd numberOfBits -> div [] [ str <| gateNDescription numberOfBits And]
| NbitsOr numberOfBits -> div [] [ str <| gateNDescription numberOfBits Or]
| NbitsNot numberOfBits -> div [] [ str <|
$"Not-N block. {numberOfBits} Not gates used one for each bit of the {numberOfBits}-bit input and output busses."]
| NbitSpreader numberOfBits -> div [] [ str <| sprintf "Bus Spreader: every bit in the %d-bit output wire is the same as the 1-bit input. \
Used to implement sign extension and shift operations." numberOfBits]
| Decode4 -> div [] [ str <| "4 bit decoder: Data is output on the Sel output, all other outputs are 0."]
Expand Down

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