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use the TCG code generator
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3944 c046a42c-6fe2-441c-8c8c-71466251a162
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bellard committed Feb 1, 2008
1 parent c896fe2 commit 57fec1f
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Showing 35 changed files with 1,087 additions and 2,353 deletions.
5 changes: 4 additions & 1 deletion LICENSE
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Expand Up @@ -10,6 +10,9 @@ In particular, the QEMU virtual CPU core library (libqemu.a) is
released under the GNU Lesser General Public License. Many hardware
device emulation sources are released under the BSD license.

3) QEMU is a trademark of Fabrice Bellard.
3) The Tiny Code Generator (TCG) is released under the BSD license
(see license headers in files).

4) QEMU is a trademark of Fabrice Bellard.

Fabrice Bellard.
17 changes: 10 additions & 7 deletions Makefile.target
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Expand Up @@ -172,8 +172,11 @@ all: $(PROGS)

#########################################################
# cpu emulator library
LIBOBJS=exec.o kqemu.o translate-op.o translate-all.o cpu-exec.o\
LIBOBJS=exec.o kqemu.o translate-all.o cpu-exec.o\
translate.o op.o host-utils.o
# TCG code generator
LIBOBJS+= tcg/tcg.o tcg/tcg-dyngen.o tcg/tcg-runtime.o
CPPFLAGS+=-I$(SRC_PATH)/tcg -I$(SRC_PATH)/tcg/$(ARCH)
ifdef CONFIG_SOFTFLOAT
LIBOBJS+=fpu/softfloat.o
else
Expand Down Expand Up @@ -268,16 +271,16 @@ libqemu.a: $(LIBOBJS)
rm -f $@
$(AR) rcs $@ $(LIBOBJS)

translate.o: translate.c gen-op.h opc.h cpu.h
translate.o: translate.c gen-op.h dyngen-opc.h cpu.h

translate-all.o: translate-all.c opc.h cpu.h
translate-all.o: translate-all.c dyngen-opc.h cpu.h

translate-op.o: translate-all.c op.h opc.h cpu.h
tcg/tcg.o: op.h dyngen-opc.h cpu.h

op.h: op.o $(DYNGEN)
$(DYNGEN) -o $@ $<

opc.h: op.o $(DYNGEN)
dyngen-opc.h: op.o $(DYNGEN)
$(DYNGEN) -c -o $@ $<

gen-op.h: op.o $(DYNGEN)
Expand Down Expand Up @@ -648,8 +651,8 @@ endif # !CONFIG_USER_ONLY
$(CC) $(CPPFLAGS) -c -o $@ $<

clean:
rm -f *.o *.a *~ $(PROGS) gen-op.h opc.h op.h nwfpe/*.o fpu/*.o
rm -f *.d */*.d
rm -f *.o *.a *~ $(PROGS) gen-op.h dyngen-opc.h op.h nwfpe/*.o fpu/*.o
rm -f *.d */*.d tcg/*.o

install: all
ifneq ($(PROGS),)
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1 change: 1 addition & 0 deletions configure
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Expand Up @@ -1051,6 +1051,7 @@ test -f $config_h && mv $config_h ${config_h}~

mkdir -p $target_dir
mkdir -p $target_dir/fpu
mkdir -p $target_dir/tcg
if test "$target" = "arm-linux-user" -o "$target" = "armeb-linux-user" ; then
mkdir -p $target_dir/nwfpe
fi
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12 changes: 12 additions & 0 deletions cpu-all.h
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Expand Up @@ -1048,6 +1048,18 @@ extern int64_t kqemu_ret_int_count;
extern int64_t kqemu_ret_excp_count;
extern int64_t kqemu_ret_intr_count;

extern int64_t dyngen_tb_count1;
extern int64_t dyngen_tb_count;
extern int64_t dyngen_op_count;
extern int64_t dyngen_old_op_count;
extern int64_t dyngen_tcg_del_op_count;
extern int dyngen_op_count_max;
extern int64_t dyngen_code_in_len;
extern int64_t dyngen_code_out_len;
extern int64_t dyngen_interm_time;
extern int64_t dyngen_code_time;
extern int64_t dyngen_restore_count;
extern int64_t dyngen_restore_time;
#endif

#endif /* CPU_ALL_H */
1 change: 1 addition & 0 deletions cpu-defs.h
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Expand Up @@ -145,6 +145,7 @@ typedef struct CPUTLBEntry {
/* The meaning of the MMU modes is defined in the target code. */ \
CPUTLBEntry tlb_table[NB_MMU_MODES][CPU_TLB_SIZE]; \
struct TranslationBlock *tb_jmp_cache[TB_JMP_CACHE_SIZE]; \
long temp_buf[128]; /* buffer for temporaries in the code generator */ \
\
/* from this point: preserved by CPU reset */ \
/* ice debug support */ \
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4 changes: 2 additions & 2 deletions cpu-exec.c
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Expand Up @@ -354,7 +354,7 @@ int cpu_exec(CPUState *env1)
#endif
#endif
int ret, interrupt_request;
void (*gen_func)(void);
long (*gen_func)(void);
TranslationBlock *tb;
uint8_t *tc_ptr;

Expand Down Expand Up @@ -736,7 +736,7 @@ int cpu_exec(CPUState *env1)
fp.gp = code_gen_buffer + 2 * (1 << 20);
(*(void (*)(void)) &fp)();
#else
gen_func();
T0 = gen_func();
#endif
env->current_tb = NULL;
/* reset soft MMU for next block (it can currently
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9 changes: 0 additions & 9 deletions dyngen-op.h

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