ASoC: rl6231: fix range of DMIC clock

The maximum DMIC clock rate is 3.072 MHz for most DMIC. And it will get better performance in higher clock rate. If we set maximum to 3 MHz in driver, we will get a clock rate which is not even close to 3 MHz. For example, if DMIC clock source is 24.576 MHz, the DMIC clock will be about 1.5 MHz in current code. But it will be 3.072 MHz with this patch. Signed-off-by: John Lin <[email protected]> Signed-off-by: Mark Brown <[email protected]>
akeromi · Nov 16, 2015 · 7336dce · 7336dce
1 parent 2f64b6e
commit 7336dce
Showing 1 changed file with 2 additions and 2 deletions.
diff --git a/sound/soc/codecs/rl6231.c b/sound/soc/codecs/rl6231.c
@@ -82,8 +82,8 @@ int rl6231_calc_dmic_clk(int rate)
 	for (i = 0; i < ARRAY_SIZE(div); i++) {
 		if ((div[i] % 3) == 0)
 			continue;
-		/* find divider that gives DMIC frequency below 3MHz */
-		if (3000000 * div[i] >= rate)
+		/* find divider that gives DMIC frequency below 3.072MHz */
+		if (3072000 * div[i] >= rate)
 			return i;
 	}