This project hosts related projects and OSS tools, consists of,
rasoc
package,import rasoc as ra
,rasoc-hw
, provides stable PL.xsa
platform,rasoc-fw
, PS firmware.
This project hosts related projects and OSS tools, consists of,
rasoc
package, import rasoc as ra
,rasoc-hw
, provides stable PL .xsa
platform,rasoc-fw
, PS firmware.Forked from Xilinx/embeddedsw
Xilinx Embedded Software (embeddedsw) Development (FMMU branch)
HTML
Forked from mathworks/FPGA-Adaptive-Beamforming-and-Radar-Examples
This repository contains FPGA/HDL demonstrations several beamforming and radar designs. Simulink models and MATLAB reference code are provided to showcase high-level simulation and HDL designs of v…
MATLAB
Forked from thejonaslab/pychirpz
Python and C++ implementation of the Chirp-Z transform
Python
Forked from erihsu/INT_FP_MAC
INT8 & FP16 multiplier accumulator (MAC) design with UVM verification completed.
Verilog
Forked from strath-sdr/rfsoc_frequency_planner
An RFSoC Frequency Planner developed using Python.
Python
Forked from mesarcik/DRFM
Code for paper entitled "Low Cost FPGA based Implementation of a DRFM System"
Verilog
Example designs for FPGA Drive FMC
This repository contains FPGA/HDL demonstrations several beamforming and radar designs. Simulink models and MATLAB reference code are provided to showcase high-level simulation and HDL designs of various radar and array processing algorithms.
An RFSoC Frequency Planner developed using Python.
Sythesizable, modular Verilog implementation of 802.11 OFDM decoder.
High-performance Ethernet components for FPGA implementation
This repo contains the Limago code
VNx: Vitis Network Examples
RFSoC QSFP Data Offload Design with GNU Radio
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