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target/arm: Extend arm_fi_to_lfsc to level -1
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With FEAT_LPA2, rather than introducing translation level 4,
we introduce level -1, below the current level 0.  Extend
arm_fi_to_lfsc to handle these faults.

Assert that this new translation level does not leak into
fault types for which it is not defined, which allows some
masking of fi->level to be removed.

Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>
Message-id: [email protected]
Signed-off-by: Peter Maydell <[email protected]>
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rth7680 authored and pm215 committed Mar 2, 2022
1 parent 7a928f4 commit 13e481c
Showing 1 changed file with 29 additions and 6 deletions.
35 changes: 29 additions & 6 deletions target/arm/internals.h
Original file line number Diff line number Diff line change
Expand Up @@ -462,28 +462,51 @@ static inline uint32_t arm_fi_to_lfsc(ARMMMUFaultInfo *fi)
case ARMFault_None:
return 0;
case ARMFault_AddressSize:
fsc = fi->level & 3;
assert(fi->level >= -1 && fi->level <= 3);
if (fi->level < 0) {
fsc = 0b101001;
} else {
fsc = fi->level;
}
break;
case ARMFault_AccessFlag:
fsc = (fi->level & 3) | (0x2 << 2);
assert(fi->level >= 0 && fi->level <= 3);
fsc = 0b001000 | fi->level;
break;
case ARMFault_Permission:
fsc = (fi->level & 3) | (0x3 << 2);
assert(fi->level >= 0 && fi->level <= 3);
fsc = 0b001100 | fi->level;
break;
case ARMFault_Translation:
fsc = (fi->level & 3) | (0x1 << 2);
assert(fi->level >= -1 && fi->level <= 3);
if (fi->level < 0) {
fsc = 0b101011;
} else {
fsc = 0b000100 | fi->level;
}
break;
case ARMFault_SyncExternal:
fsc = 0x10 | (fi->ea << 12);
break;
case ARMFault_SyncExternalOnWalk:
fsc = (fi->level & 3) | (0x5 << 2) | (fi->ea << 12);
assert(fi->level >= -1 && fi->level <= 3);
if (fi->level < 0) {
fsc = 0b010011;
} else {
fsc = 0b010100 | fi->level;
}
fsc |= fi->ea << 12;
break;
case ARMFault_SyncParity:
fsc = 0x18;
break;
case ARMFault_SyncParityOnWalk:
fsc = (fi->level & 3) | (0x7 << 2);
assert(fi->level >= -1 && fi->level <= 3);
if (fi->level < 0) {
fsc = 0b011011;
} else {
fsc = 0b011100 | fi->level;
}
break;
case ARMFault_AsyncParity:
fsc = 0x19;
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