MIPS: Use GCC __builtin_prefetch() to implement prefetch().

GCC's __builtin_prefetch() was introduced a long time ago, all supported GCC versions have it. Lets do what the big boys up in linux/prefetch.h do, except we use '1' as the third parameter to provoke 'PREF 0,...' and 'PREF 1,...' instead of other prefetch hints. This allows for better code generation. In theory the existing embedded asm could be optimized, but the compiler has these builtins, so there is really no point. Signed-off-by: David Daney <[email protected]> To: [email protected] Patchwork: http://patchwork.linux-mips.org/patch/1235/ Signed-off-by: Ralf Baechle <[email protected]>
ambv · May 21, 2010 · 0453fb3 · 0453fb3
1 parent 606c958
commit 0453fb3
Showing 1 changed file with 3 additions and 9 deletions.
diff --git a/arch/mips/include/asm/processor.h b/arch/mips/include/asm/processor.h
@@ -344,16 +344,10 @@ unsigned long get_wchan(struct task_struct *p);
 #ifdef CONFIG_CPU_HAS_PREFETCH
 
 #define ARCH_HAS_PREFETCH
+#define prefetch(x) __builtin_prefetch((x), 0, 1)
 
-static inline void prefetch(const void *addr)
-{
-	__asm__ __volatile__(
-	"	.set	mips4		\n"
-	"	pref	%0, (%1)	\n"
-	"	.set	mips0		\n"
-	:
-	: "i" (Pref_Load), "r" (addr));
-}
+#define ARCH_HAS_PREFETCHW
+#define prefetchw(x) __builtin_prefetch((x), 1, 1)
 
 #endif