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Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Pull networking fixes from David Miller:
1) Include fixes for netrom and dsa (Fabian Frederick and Florian
Fainelli)
2) Fix FIXED_PHY support in stmmac, from Giuseppe CAVALLARO.
3) Several SKB use after free fixes (vxlan, openvswitch, vxlan,
ip_tunnel, fou), from Li ROngQing.
4) fec driver PTP support fixes from Luwei Zhou and Nimrod Andy.
5) Use after free in virtio_net, from Michael S Tsirkin.
6) Fix flow mask handling for megaflows in openvswitch, from Pravin B
Shelar.
7) ISDN gigaset and capi bug fixes from Tilman Schmidt.
8) Fix route leak in ip_send_unicast_reply(), from Vasily Averin.
9) Fix two eBPF JIT bugs on x86, from Alexei Starovoitov.
10) TCP_SKB_CB() reorganization caused a few regressions, fixed by Cong
Wang and Eric Dumazet.
11) Don't overwrite end of SKB when parsing malformed sctp ASCONF
chunks, from Daniel Borkmann.
12) Don't call sock_kfree_s() with NULL pointers, this function also has
the side effect of adjusting the socket memory usage. From Cong Wang.
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (90 commits)
bna: fix skb->truesize underestimation
net: dsa: add includes for ethtool and phy_fixed definitions
openvswitch: Set flow-key members.
netrom: use linux/uaccess.h
dsa: Fix conversion from host device to mii bus
tipc: fix bug in bundled buffer reception
ipv6: introduce tcp_v6_iif()
sfc: add support for skb->xmit_more
r8152: return -EBUSY for runtime suspend
ipv4: fix a potential use after free in fou.c
ipv4: fix a potential use after free in ip_tunnel_core.c
hyperv: Add handling of IP header with option field in netvsc_set_hash()
openvswitch: Create right mask with disabled megaflows
vxlan: fix a free after use
openvswitch: fix a use after free
ipv4: dst_entry leak in ip_send_unicast_reply()
ipv4: clean up cookie_v4_check()
ipv4: share tcp_v4_save_options() with cookie_v4_check()
ipv4: call __ip_options_echo() in cookie_v4_check()
atm: simplify lanai.c by using module_pci_driver
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -1,58 +1,65 @@ | ||
| STMicroelectronics SoC DWMAC glue layer controller | ||
|
|
||
| This file documents differences between the core properties in | ||
| Documentation/devicetree/bindings/net/stmmac.txt | ||
| and what is needed on STi platforms to program the stmmac glue logic. | ||
|
|
||
| The device node has following properties. | ||
|
|
||
| Required properties: | ||
| - compatible : Can be "st,stih415-dwmac", "st,stih416-dwmac" or | ||
| "st,stid127-dwmac". | ||
| - reg : Offset of the glue configuration register map in system | ||
| - compatible : Can be "st,stih415-dwmac", "st,stih416-dwmac", | ||
| "st,stih407-dwmac", "st,stid127-dwmac". | ||
| - reg : Offset of the glue configuration register map in system | ||
| configuration regmap pointed by st,syscon property and size. | ||
|
|
||
| - reg-names : Should be "sti-ethconf". | ||
|
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||
| - st,syscon : Should be phandle to system configuration node which | ||
| - st,syscon : Should be phandle to system configuration node which | ||
| encompases this glue registers. | ||
| - st,gmac_en: this is to enable the gmac into a dedicated sysctl control | ||
| register available on STiH407 SoC. | ||
| - sti-ethconf: this is the gmac glue logic register to enable the GMAC, | ||
| select among the different modes and program the clk retiming. | ||
| - pinctrl-0: pin-control for all the MII mode supported. | ||
|
|
||
| - st,tx-retime-src: On STi Parts for Giga bit speeds, 125Mhz clocks can be | ||
| wired up in from different sources. One via TXCLK pin and other via CLK_125 | ||
| pin. This wiring is totally board dependent. However the retiming glue | ||
| logic should be configured accordingly. Possible values for this property | ||
|
|
||
| "txclk" - if 125Mhz clock is wired up via txclk line. | ||
| "clk_125" - if 125Mhz clock is wired up via clk_125 line. | ||
|
|
||
| This property is only valid for Giga bit setup( GMII, RGMII), and it is | ||
| un-used for non-giga bit (MII and RMII) setups. Also note that internal | ||
| clockgen can not generate stable 125Mhz clock. | ||
|
|
||
| - st,ext-phyclk: This boolean property indicates who is generating the clock | ||
| for tx and rx. This property is only valid for RMII case where the clock can | ||
| be generated from the MAC or PHY. | ||
|
|
||
| - clock-names: should be "sti-ethclk". | ||
| - clocks: Should point to ethernet clockgen which can generate phyclk. | ||
|
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||
| Optional properties: | ||
| - resets : phandle pointing to the system reset controller with correct | ||
| reset line index for ethernet reset. | ||
| - st,ext-phyclk: valid only for RMII where PHY can generate 50MHz clock or | ||
| MAC can generate it. | ||
| - st,tx-retime-src: This specifies which clk is wired up to the mac for | ||
| retimeing tx lines. This is totally board dependent and can take one of the | ||
| posssible values from "txclk", "clk_125" or "clkgen". | ||
| If not passed, the internal clock will be used by default. | ||
| - sti-ethclk: this is the phy clock. | ||
| - sti-clkconf: this is an extra sysconfig register, available in new SoCs, | ||
| to program the clk retiming. | ||
| - st,gmac_en: to enable the GMAC, this only is present in some SoCs; e.g. | ||
| STiH407. | ||
|
|
||
| Example: | ||
|
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||
| ethernet0: dwmac@fe810000 { | ||
| device_type = "network"; | ||
| compatible = "st,stih416-dwmac", "snps,dwmac", "snps,dwmac-3.710"; | ||
| reg = <0xfe810000 0x8000>, <0x8bc 0x4>; | ||
| reg-names = "stmmaceth", "sti-ethconf"; | ||
| interrupts = <0 133 0>, <0 134 0>, <0 135 0>; | ||
| interrupt-names = "macirq", "eth_wake_irq", "eth_lpi"; | ||
| phy-mode = "mii"; | ||
| ethernet0: dwmac@9630000 { | ||
| device_type = "network"; | ||
| status = "disabled"; | ||
| compatible = "st,stih407-dwmac", "snps,dwmac", "snps,dwmac-3.710"; | ||
| reg = <0x9630000 0x8000>, <0x80 0x4>; | ||
| reg-names = "stmmaceth", "sti-ethconf"; | ||
|
|
||
| st,syscon = <&syscfg_rear>; | ||
| st,syscon = <&syscfg_sbc_reg>; | ||
| st,gmac_en; | ||
| resets = <&softreset STIH407_ETH1_SOFTRESET>; | ||
| reset-names = "stmmaceth"; | ||
|
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||
| snps,pbl = <32>; | ||
| interrupts = <GIC_SPI 98 IRQ_TYPE_NONE>, | ||
| <GIC_SPI 99 IRQ_TYPE_NONE>, | ||
| <GIC_SPI 100 IRQ_TYPE_NONE>; | ||
| interrupt-names = "macirq", "eth_wake_irq", "eth_lpi"; | ||
|
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||
| snps,pbl = <32>; | ||
| snps,mixed-burst; | ||
|
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| resets = <&softreset STIH416_ETH0_SOFTRESET>; | ||
| reset-names = "stmmaceth"; | ||
| pinctrl-0 = <&pinctrl_mii0>; | ||
| pinctrl-names = "default"; | ||
| clocks = <&CLK_S_GMAC0_PHY>; | ||
| clock-names = "stmmaceth"; | ||
| pinctrl-names = "default"; | ||
| pinctrl-0 = <&pinctrl_rgmii1>; | ||
|
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||
| clock-names = "stmmaceth", "sti-ethclk"; | ||
| clocks = <&CLK_S_C0_FLEXGEN CLK_EXT2F_A9>, | ||
| <&CLK_S_C0_FLEXGEN CLK_ETH_PHY>; | ||
| }; |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
|
|
@@ -564,7 +564,7 @@ L: [email protected] | |
| F: arch/alpha/ | ||
|
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||
| ALTERA TRIPLE SPEED ETHERNET DRIVER | ||
| M: Vince Bridgers <vbridgers2013@gmail.com> | ||
| M: Vince Bridgers <[email protected].com> | ||
| L: [email protected] | ||
| L: [email protected] (moderated for non-subscribers) | ||
| S: Maintained | ||
|
|
||
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
|
|
@@ -41,6 +41,10 @@ | |
| status = "ok"; | ||
| }; | ||
|
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| &sgenet0 { | ||
| status = "ok"; | ||
| }; | ||
|
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| &xgenet { | ||
| status = "ok"; | ||
| }; | ||
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
|
|
@@ -2614,27 +2614,7 @@ static struct pci_driver lanai_driver = { | |
| .probe = lanai_init_one, | ||
| }; | ||
|
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||
| static int __init lanai_module_init(void) | ||
| { | ||
| int x; | ||
|
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| x = pci_register_driver(&lanai_driver); | ||
| if (x != 0) | ||
| printk(KERN_ERR DEV_LABEL ": no adapter found\n"); | ||
| return x; | ||
| } | ||
|
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||
| static void __exit lanai_module_exit(void) | ||
| { | ||
| /* We'll only get called when all the interfaces are already | ||
| * gone, so there isn't much to do | ||
| */ | ||
| DPRINTK("cleanup_module()\n"); | ||
| pci_unregister_driver(&lanai_driver); | ||
| } | ||
|
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| module_init(lanai_module_init); | ||
| module_exit(lanai_module_exit); | ||
| module_pci_driver(lanai_driver); | ||
|
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| MODULE_AUTHOR("Mitchell Blank Jr <[email protected]>"); | ||
| MODULE_DESCRIPTION("Efficient Networks Speedstream 3010 driver"); | ||
|
|
||
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