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Merge branches 'arm/exynos', 'arm/renesas', 'arm/rockchip', 'arm/omap…
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…', 'arm/mediatek', 'arm/tegra', 'arm/qcom', 'arm/smmu', 'ppc/pamu', 'x86/vt-d', 'x86/amd', 's390' and 'core' into next
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joergroedel committed Sep 1, 2017
14 parents cc4a41f + 0b9a369 + 8da4af9 + c3aa474 + bfee0cf + 4193998 + 96302d8 + 6ce5b0f + af6ee6c + 3ff2dcc + 5082219 + ec62b1a + cceb845 + add02cf commit 47b59d8
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Showing 41 changed files with 2,881 additions and 1,233 deletions.
121 changes: 121 additions & 0 deletions Documentation/devicetree/bindings/iommu/qcom,iommu.txt
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@@ -0,0 +1,121 @@
* QCOM IOMMU v1 Implementation

Qualcomm "B" family devices which are not compatible with arm-smmu have
a similar looking IOMMU but without access to the global register space,
and optionally requiring additional configuration to route context irqs
to non-secure vs secure interrupt line.

** Required properties:

- compatible : Should be one of:

"qcom,msm8916-iommu"

Followed by "qcom,msm-iommu-v1".

- clock-names : Should be a pair of "iface" (required for IOMMUs
register group access) and "bus" (required for
the IOMMUs underlying bus access).

- clocks : Phandles for respective clocks described by
clock-names.

- #address-cells : must be 1.

- #size-cells : must be 1.

- #iommu-cells : Must be 1. Index identifies the context-bank #.

- ranges : Base address and size of the iommu context banks.

- qcom,iommu-secure-id : secure-id.

- List of sub-nodes, one per translation context bank. Each sub-node
has the following required properties:

- compatible : Should be one of:
- "qcom,msm-iommu-v1-ns" : non-secure context bank
- "qcom,msm-iommu-v1-sec" : secure context bank
- reg : Base address and size of context bank within the iommu
- interrupts : The context fault irq.

** Optional properties:

- reg : Base address and size of the SMMU local base, should
be only specified if the iommu requires configuration
for routing of context bank irq's to secure vs non-
secure lines. (Ie. if the iommu contains secure
context banks)


** Examples:

apps_iommu: iommu@1e20000 {
#address-cells = <1>;
#size-cells = <1>;
#iommu-cells = <1>;
compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1";
ranges = <0 0x1e20000 0x40000>;
reg = <0x1ef0000 0x3000>;
clocks = <&gcc GCC_SMMU_CFG_CLK>,
<&gcc GCC_APSS_TCU_CLK>;
clock-names = "iface", "bus";
qcom,iommu-secure-id = <17>;

// mdp_0:
iommu-ctx@4000 {
compatible = "qcom,msm-iommu-v1-ns";
reg = <0x4000 0x1000>;
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
};

// venus_ns:
iommu-ctx@5000 {
compatible = "qcom,msm-iommu-v1-sec";
reg = <0x5000 0x1000>;
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
};
};

gpu_iommu: iommu@1f08000 {
#address-cells = <1>;
#size-cells = <1>;
#iommu-cells = <1>;
compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1";
ranges = <0 0x1f08000 0x10000>;
clocks = <&gcc GCC_SMMU_CFG_CLK>,
<&gcc GCC_GFX_TCU_CLK>;
clock-names = "iface", "bus";
qcom,iommu-secure-id = <18>;

// gfx3d_user:
iommu-ctx@1000 {
compatible = "qcom,msm-iommu-v1-ns";
reg = <0x1000 0x1000>;
interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
};

// gfx3d_priv:
iommu-ctx@2000 {
compatible = "qcom,msm-iommu-v1-ns";
reg = <0x2000 0x1000>;
interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>;
};
};

...

venus: video-codec@1d00000 {
...
iommus = <&apps_iommu 5>;
};

mdp: mdp@1a01000 {
...
iommus = <&apps_iommu 4>;
};

gpu@01c00000 {
...
iommus = <&gpu_iommu 1>, <&gpu_iommu 2>;
};
5 changes: 5 additions & 0 deletions Documentation/devicetree/bindings/iommu/rockchip,iommu.txt
Original file line number Diff line number Diff line change
Expand Up @@ -15,6 +15,11 @@ Required properties:
to associate with its master device. See:
Documentation/devicetree/bindings/iommu/iommu.txt

Optional properties:
- rockchip,disable-mmu-reset : Don't use the mmu reset operation.
Some mmu instances may produce unexpected results
when the reset operation is used.

Example:

vopl_mmu: iommu@ff940300 {
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -15,6 +15,9 @@ Required properties:
the register.
- "smi" : It's the clock for transfer data and command.

Required property for mt2701:
- mediatek,larb-id :the hardware id of this larb.

Example:
larb1: larb@16010000 {
compatible = "mediatek,mt8173-smi-larb";
Expand All @@ -25,3 +28,15 @@ Example:
<&vdecsys CLK_VDEC_LARB_CKEN>;
clock-names = "apb", "smi";
};

Example for mt2701:
larb0: larb@14010000 {
compatible = "mediatek,mt2701-smi-larb";
reg = <0 0x14010000 0 0x1000>;
mediatek,smi = <&smi_common>;
mediatek,larb-id = <0>;
clocks = <&mmsys CLK_MM_SMI_LARB0>,
<&mmsys CLK_MM_SMI_LARB0>;
clock-names = "apb", "smi";
power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>;
};
7 changes: 7 additions & 0 deletions MAINTAINERS
Original file line number Diff line number Diff line change
Expand Up @@ -10940,6 +10940,13 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/rkuo/linux-hexagon-kernel.g
S: Supported
F: arch/hexagon/

QUALCOMM IOMMU
M: Rob Clark <[email protected]>
L: [email protected]
L: [email protected]
S: Maintained
F: drivers/iommu/qcom_iommu.c

QUALCOMM VENUS VIDEO ACCELERATOR DRIVER
M: Stanimir Varbanov <[email protected]>
L: [email protected]
Expand Down
7 changes: 7 additions & 0 deletions arch/s390/include/asm/pci.h
Original file line number Diff line number Diff line change
Expand Up @@ -8,6 +8,7 @@

#include <linux/pci.h>
#include <linux/mutex.h>
#include <linux/iommu.h>
#include <asm-generic/pci.h>
#include <asm/pci_clp.h>
#include <asm/pci_debug.h>
Expand Down Expand Up @@ -122,6 +123,8 @@ struct zpci_dev {
unsigned long iommu_pages;
unsigned int next_bit;

struct iommu_device iommu_dev; /* IOMMU core handle */

char res_name[16];
struct zpci_bar_struct bars[PCI_BAR_COUNT];

Expand Down Expand Up @@ -174,6 +177,10 @@ int clp_enable_fh(struct zpci_dev *, u8);
int clp_disable_fh(struct zpci_dev *);
int clp_get_state(u32 fid, enum zpci_state *state);

/* IOMMU Interface */
int zpci_init_iommu(struct zpci_dev *zdev);
void zpci_destroy_iommu(struct zpci_dev *zdev);

#ifdef CONFIG_PCI
/* Error handling and recovery */
void zpci_event_error(void *);
Expand Down
9 changes: 8 additions & 1 deletion arch/s390/pci/pci.c
Original file line number Diff line number Diff line change
Expand Up @@ -776,6 +776,7 @@ void pcibios_remove_bus(struct pci_bus *bus)

zpci_exit_slot(zdev);
zpci_cleanup_bus_resources(zdev);
zpci_destroy_iommu(zdev);
zpci_free_domain(zdev);

spin_lock(&zpci_list_lock);
Expand Down Expand Up @@ -848,11 +849,15 @@ int zpci_create_device(struct zpci_dev *zdev)
if (rc)
goto out;

rc = zpci_init_iommu(zdev);
if (rc)
goto out_free;

mutex_init(&zdev->lock);
if (zdev->state == ZPCI_FN_STATE_CONFIGURED) {
rc = zpci_enable_device(zdev);
if (rc)
goto out_free;
goto out_destroy_iommu;
}
rc = zpci_scan_bus(zdev);
if (rc)
Expand All @@ -869,6 +874,8 @@ int zpci_create_device(struct zpci_dev *zdev)
out_disable:
if (zdev->state == ZPCI_FN_STATE_ONLINE)
zpci_disable_device(zdev);
out_destroy_iommu:
zpci_destroy_iommu(zdev);
out_free:
zpci_free_domain(zdev);
out:
Expand Down
13 changes: 13 additions & 0 deletions drivers/iommu/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -76,6 +76,8 @@ config IOMMU_DMA

config FSL_PAMU
bool "Freescale IOMMU support"
depends on PCI
depends on PHYS_64BIT
depends on PPC_E500MC || (COMPILE_TEST && PPC)
select IOMMU_API
select GENERIC_ALLOCATOR
Expand Down Expand Up @@ -253,6 +255,7 @@ config TEGRA_IOMMU_SMMU
config EXYNOS_IOMMU
bool "Exynos IOMMU Support"
depends on ARCH_EXYNOS && MMU
depends on !CPU_BIG_ENDIAN # revisit driver if we can enable big-endian ptes
select IOMMU_API
select ARM_DMA_USE_IOMMU
help
Expand Down Expand Up @@ -367,4 +370,14 @@ config MTK_IOMMU_V1

if unsure, say N here.

config QCOM_IOMMU
# Note: iommu drivers cannot (yet?) be built as modules
bool "Qualcomm IOMMU Support"
depends on ARCH_QCOM || COMPILE_TEST
select IOMMU_API
select IOMMU_IO_PGTABLE_LPAE
select ARM_DMA_USE_IOMMU
help
Support for IOMMU on certain Qualcomm SoCs.

endif # IOMMU_SUPPORT
1 change: 1 addition & 0 deletions drivers/iommu/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -27,3 +27,4 @@ obj-$(CONFIG_TEGRA_IOMMU_SMMU) += tegra-smmu.o
obj-$(CONFIG_EXYNOS_IOMMU) += exynos-iommu.o
obj-$(CONFIG_FSL_PAMU) += fsl_pamu.o fsl_pamu_domain.o
obj-$(CONFIG_S390_IOMMU) += s390-iommu.o
obj-$(CONFIG_QCOM_IOMMU) += qcom_iommu.o
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