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dt-bindings: msm: dsi: add missing 7nm bindings
These got lost when going from .txt to .yaml bindings, add them back. Signed-off-by: Jonathan Marek <[email protected]> Fixes: 8fc939e ("dt-bindings: msm: dsi: add yaml schemas for DSI PHY bindings") Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Rob Clark <[email protected]>
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Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml
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# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause | ||
%YAML 1.2 | ||
--- | ||
$id: http://devicetree.org/schemas/display/msm/dsi-phy-7nm.yaml# | ||
$schema: http://devicetree.org/meta-schemas/core.yaml# | ||
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title: Qualcomm Display DSI 7nm PHY | ||
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maintainers: | ||
- Jonathan Marek <[email protected]> | ||
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allOf: | ||
- $ref: dsi-phy-common.yaml# | ||
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properties: | ||
compatible: | ||
oneOf: | ||
- const: qcom,dsi-phy-7nm | ||
- const: qcom,dsi-phy-7nm-8150 | ||
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reg: | ||
items: | ||
- description: dsi phy register set | ||
- description: dsi phy lane register set | ||
- description: dsi pll register set | ||
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reg-names: | ||
items: | ||
- const: dsi_phy | ||
- const: dsi_phy_lane | ||
- const: dsi_pll | ||
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vdds-supply: | ||
description: | | ||
Connected to VDD_A_DSI_PLL_0P9 pin (or VDDA_DSI{0,1}_PLL_0P9 for sm8150) | ||
required: | ||
- compatible | ||
- reg | ||
- reg-names | ||
- vdds-supply | ||
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unevaluatedProperties: false | ||
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examples: | ||
- | | ||
#include <dt-bindings/clock/qcom,dispcc-sm8250.h> | ||
#include <dt-bindings/clock/qcom,rpmh.h> | ||
dsi-phy@ae94400 { | ||
compatible = "qcom,dsi-phy-7nm"; | ||
reg = <0x0ae94400 0x200>, | ||
<0x0ae94600 0x280>, | ||
<0x0ae94900 0x260>; | ||
reg-names = "dsi_phy", | ||
"dsi_phy_lane", | ||
"dsi_pll"; | ||
#clock-cells = <1>; | ||
#phy-cells = <0>; | ||
vdds-supply = <&vreg_l5a_0p88>; | ||
clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, | ||
<&rpmhcc RPMH_CXO_CLK>; | ||
clock-names = "iface", "ref"; | ||
}; |