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Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git…
…/herbert/crypto-2.6 Pull crypto update from Herbert Xu: "API: - Crypto self tests can now be disabled at boot/run time. - Add async support to algif_aead. Algorithms: - A large number of fixes to MPI from Nicolai Stange. - Performance improvement for HMAC DRBG. Drivers: - Use generic crypto engine in omap-des. - Merge ppc4xx-rng and crypto4xx drivers. - Fix lockups in sun4i-ss driver by disabling IRQs. - Add DMA engine support to ccp. - Reenable talitos hash algorithms. - Add support for Hisilicon SoC RNG. - Add basic crypto driver for the MXC SCC. Others: - Do not allocate crypto hash tfm in NORECLAIM context in ecryptfs" * 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (77 commits) crypto: qat - change the adf_ctl_stop_devices to void crypto: caam - fix caam_jr_alloc() ret code crypto: vmx - comply with ABIs that specify vrsave as reserved. crypto: testmgr - Add a flag allowing the self-tests to be disabled at runtime. crypto: ccp - constify ccp_actions structure crypto: marvell/cesa - Use dma_pool_zalloc crypto: qat - make adf_vf_isr.c dependant on IOV config crypto: qat - Fix typo in comments lib: asn1_decoder - add MODULE_LICENSE("GPL") crypto: omap-sham - Use dma_request_chan() for requesting DMA channel crypto: omap-des - Use dma_request_chan() for requesting DMA channel crypto: omap-aes - Use dma_request_chan() for requesting DMA channel crypto: omap-des - Integrate with the crypto engine framework crypto: s5p-sss - fix incorrect usage of scatterlists api crypto: s5p-sss - Fix missed interrupts when working with 8 kB blocks crypto: s5p-sss - Use common BIT macro crypto: mxc-scc - fix unwinding in mxc_scc_crypto_register() crypto: mxc-scc - signedness bugs in mxc_scc_ablkcipher_req_init() crypto: talitos - fix ahash algorithms registration crypto: ccp - Ensure all dependencies are specified ...
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Original file line number | Diff line number | Diff line change |
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Freescale Security Controller (SCC) | ||
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Required properties: | ||
- compatible : Should be "fsl,imx25-scc". | ||
- reg : Should contain register location and length. | ||
- interrupts : Should contain interrupt numbers for SCM IRQ and SMN IRQ. | ||
- interrupt-names : Should specify the names "scm" and "smn" for the | ||
SCM IRQ and SMN IRQ. | ||
- clocks: Should contain the clock driving the SCC core. | ||
- clock-names: Should be set to "ipg". | ||
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Example: | ||
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scc: crypto@53fac000 { | ||
compatible = "fsl,imx25-scc"; | ||
reg = <0x53fac000 0x4000>; | ||
clocks = <&clks 111>; | ||
clock-names = "ipg"; | ||
interrupts = <49>, <50>; | ||
interrupt-names = "scm", "smn"; | ||
}; |
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,12 @@ | ||
Hisilicon Random Number Generator | ||
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Required properties: | ||
- compatible : Should be "hisilicon,hip04-rng" or "hisilicon,hip05-rng" | ||
- reg : Offset and length of the register set of this block | ||
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Example: | ||
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rng@d1010000 { | ||
compatible = "hisilicon,hip05-rng"; | ||
reg = <0xd1010000 0x100>; | ||
}; |
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Original file line number | Diff line number | Diff line change |
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@@ -627,6 +627,7 @@ F: include/linux/altera_jtaguart.h | |
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AMD CRYPTOGRAPHIC COPROCESSOR (CCP) DRIVER | ||
M: Tom Lendacky <[email protected]> | ||
M: Gary Hook <[email protected]> | ||
L: [email protected] | ||
S: Supported | ||
F: drivers/crypto/ccp/ | ||
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