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Merge branches 'clk-init-destroy', 'clk-doc', 'clk-imx' and 'clk-allw…
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…inner' into clk-next

 - Set clk_init_data pointer inside clk_hw to NULL after registration

* clk-init-destroy:
  clk: Overwrite clk_hw::init with NULL during clk_register()
  clk: sunxi: Don't call clk_hw_get_name() on a hw that isn't registered
  clk: ti: Don't reference clk_init_data after registration
  clk: qcom: Remove error prints from DFS registration
  rtc: sun6i: Don't reference clk_init_data after registration
  clk: zx296718: Don't reference clk_init_data after registration
  clk: milbeaut: Don't reference clk_init_data after registration
  clk: socfpga: deindent code to proper indentation
  phy: ti: am654-serdes: Don't reference clk_init_data after registration
  clk: sprd: Don't reference clk_init_data after registration
  clk: socfpga: Don't reference clk_init_data after registration
  clk: sirf: Don't reference clk_init_data after registration
  clk: qcom: Don't reference clk_init_data after registration
  clk: meson: axg-audio: Don't reference clk_init_data after registration
  clk: lochnagar: Don't reference clk_init_data after registration
  clk: actions: Don't reference clk_init_data after registration

* clk-doc:
  clk: remove extra ---help--- tags in Kconfig
  clk: add include guard to clk-conf.h
  clk: Document of_parse_clkspec() some more
  clk: Remove extraneous 'for' word in comments

* clk-imx: (32 commits)
  clk: imx: imx8mn: fix pll mux bit
  clk: imx: imx8mm: fix pll mux bit
  clk: imx: clk-pll14xx: unbypass PLL by default
  clk: imx: pll14xx: avoid glitch when set rate
  clk: imx: imx8mn: fix audio pll setting
  clk: imx8mn: Add necessary frequency support for ARM PLL table
  clk: imx8mn: Add missing rate_count assignment for each PLL structure
  clk: imx8mn: fix int pll clk gate
  clk: imx8mn: Add GIC clock
  clk: imx8mn: Fix incorrect parents
  clk: imx8mm: Fix incorrect parents
  clk: imx8mq: Fix sys3 pll references
  clk: imx8mq: Unregister clks when of_clk_add_provider failed
  clk: imx8mm: Unregister clks when of_clk_add_provider failed
  clk: imx8mq: Mark AHB clock as critical
  clk: imx8mn: Keep uart clocks on for early console
  clk: imx: Remove unused function statement
  clk: imx7ulp: Make sure earlycon's clock is enabled
  clk: imx8mm: Switch to platform driver
  clk: imx: imx8mm: fix audio pll setting
  ...

* clk-allwinner:
  clk: sunxi-ng: h6: Allow I2S to change parent rate
  clk: sunxi-ng: v3s: add Allwinner V3 support
  clk: sunxi-ng: v3s: add missing clock slices for MMC2 module clocks
  dt-bindings: clk: sunxi-ccu: add compatible string for V3 CCU
  clk: sunxi-ng: v3s: add the missing PLL_DDR1
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bebarino committed Sep 19, 2019
5 parents f5c7305 + 0214f33 + 863e53e + 60a8a14 + 924a8c6 commit a1ff1ce
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Showing 39 changed files with 1,639 additions and 308 deletions.
Original file line number Diff line number Diff line change
Expand Up @@ -31,6 +31,7 @@ properties:
- allwinner,sun8i-h3-ccu
- allwinner,sun8i-h3-r-ccu
- allwinner,sun8i-r40-ccu
- allwinner,sun8i-v3-ccu
- allwinner,sun8i-v3s-ccu
- allwinner,sun9i-a80-ccu
- allwinner,sun50i-a64-ccu
Expand Down
112 changes: 112 additions & 0 deletions Documentation/devicetree/bindings/clock/imx8mn-clock.yaml
Original file line number Diff line number Diff line change
@@ -0,0 +1,112 @@
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/bindings/clock/imx8mn-clock.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: NXP i.MX8M Nano Clock Control Module Binding

maintainers:
- Anson Huang <[email protected]>

description: |
NXP i.MX8M Nano clock control module is an integrated clock controller, which
generates and supplies to all modules.
properties:
compatible:
const: fsl,imx8mn-ccm

reg:
maxItems: 1

clocks:
items:
- description: 32k osc
- description: 24m osc
- description: ext1 clock input
- description: ext2 clock input
- description: ext3 clock input
- description: ext4 clock input

clock-names:
items:
- const: osc_32k
- const: osc_24m
- const: clk_ext1
- const: clk_ext2
- const: clk_ext3
- const: clk_ext4

'#clock-cells':
const: 1
description: |
The clock consumer should specify the desired clock by having the clock
ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8mn-clock.h
for the full list of i.MX8M Nano clock IDs.
required:
- compatible
- reg
- clocks
- clock-names
- '#clock-cells'

examples:
# Clock Control Module node:
- |
clk: clock-controller@30380000 {
compatible = "fsl,imx8mn-ccm";
reg = <0x0 0x30380000 0x0 0x10000>;
#clock-cells = <1>;
clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>,
<&clk_ext2>, <&clk_ext3>, <&clk_ext4>;
clock-names = "osc_32k", "osc_24m", "clk_ext1",
"clk_ext2", "clk_ext3", "clk_ext4";
};
# Required external clocks for Clock Control Module node:
- |
osc_32k: clock-osc-32k {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
clock-output-names = "osc_32k";
};
osc_24m: clock-osc-24m {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
clock-output-names = "osc_24m";
};
clk_ext1: clock-ext1 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <133000000>;
clock-output-names = "clk_ext1";
};
clk_ext2: clock-ext2 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <133000000>;
clock-output-names = "clk_ext2";
};
clk_ext3: clock-ext3 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <133000000>;
clock-output-names = "clk_ext3";
};
clk_ext4: clock-ext4 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency= <133000000>;
clock-output-names = "clk_ext4";
};
...
9 changes: 0 additions & 9 deletions drivers/clk/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -116,7 +116,6 @@ config COMMON_CLK_SI514
depends on OF
select REGMAP_I2C
help
---help---
This driver supports the Silicon Labs 514 programmable clock
generator.

Expand All @@ -125,7 +124,6 @@ config COMMON_CLK_SI544
depends on I2C
select REGMAP_I2C
help
---help---
This driver supports the Silicon Labs 544 programmable clock
generator.

Expand All @@ -135,7 +133,6 @@ config COMMON_CLK_SI570
depends on OF
select REGMAP_I2C
help
---help---
This driver supports Silicon Labs 570/571/598/599 programmable
clock generators.

Expand All @@ -153,7 +150,6 @@ config COMMON_CLK_CDCE925
depends on OF
select REGMAP_I2C
help
---help---
This driver supports the TI CDCE913/925/937/949 programmable clock
synthesizer. Each chip has different number of PLLs and outputs.
For example, the CDCE925 contains two PLLs with spread-spectrum
Expand Down Expand Up @@ -212,7 +208,6 @@ config COMMON_CLK_AXI_CLKGEN
tristate "AXI clkgen driver"
depends on ARCH_ZYNQ || MICROBLAZE || COMPILE_TEST
help
---help---
Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
FPGAs. It is commonly used in Analog Devices' reference designs.

Expand Down Expand Up @@ -279,26 +274,22 @@ config COMMON_CLK_VC5
depends on OF
select REGMAP_I2C
help
---help---
This driver supports the IDT VersaClock 5 and VersaClock 6
programmable clock generators.

config COMMON_CLK_STM32MP157
def_bool COMMON_CLK && MACH_STM32MP157
help
---help---
Support for stm32mp157 SoC family clocks

config COMMON_CLK_STM32F
def_bool COMMON_CLK && (MACH_STM32F429 || MACH_STM32F469 || MACH_STM32F746)
help
---help---
Support for stm32f4 and stm32f7 SoC families clocks

config COMMON_CLK_STM32H7
def_bool COMMON_CLK && MACH_STM32H743
help
---help---
Support for stm32h7 SoC family clocks

config COMMON_CLK_BD718XX
Expand Down
5 changes: 3 additions & 2 deletions drivers/clk/actions/owl-common.c
Original file line number Diff line number Diff line change
Expand Up @@ -68,16 +68,17 @@ int owl_clk_probe(struct device *dev, struct clk_hw_onecell_data *hw_clks)
struct clk_hw *hw;

for (i = 0; i < hw_clks->num; i++) {
const char *name;

hw = hw_clks->hws[i];

if (IS_ERR_OR_NULL(hw))
continue;

name = hw->init->name;
ret = devm_clk_hw_register(dev, hw);
if (ret) {
dev_err(dev, "Couldn't register clock %d - %s\n",
i, hw->init->name);
i, name);
return ret;
}
}
Expand Down
2 changes: 1 addition & 1 deletion drivers/clk/clk-lochnagar.c
Original file line number Diff line number Diff line change
Expand Up @@ -198,7 +198,7 @@ static u8 lochnagar_clk_get_parent(struct clk_hw *hw)
if (ret < 0) {
dev_dbg(priv->dev, "Failed to read parent of %s: %d\n",
lclk->name, ret);
return hw->init->num_parents;
return clk_hw_get_num_parents(hw);
}

val &= lclk->src_mask;
Expand Down
2 changes: 1 addition & 1 deletion drivers/clk/clk-milbeaut.c
Original file line number Diff line number Diff line change
Expand Up @@ -437,7 +437,7 @@ static int m10v_clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,
if (readl_poll_timeout(divider->write_valid_reg, val,
!val, M10V_UPOLL_RATE, M10V_UTIMEOUT))
pr_err("%s:%s couldn't stabilize\n",
__func__, divider->hw.init->name);
__func__, clk_hw_get_name(hw));
}

if (divider->lock)
Expand Down
69 changes: 54 additions & 15 deletions drivers/clk/clk.c
Original file line number Diff line number Diff line change
Expand Up @@ -2439,7 +2439,7 @@ static int clk_core_set_parent_nolock(struct clk_core *core,
if (core->parent == parent)
return 0;

/* verify ops for for multi-parent clks */
/* verify ops for multi-parent clks */
if (core->num_parents > 1 && !core->ops->set_parent)
return -EPERM;

Expand Down Expand Up @@ -3516,9 +3516,9 @@ static int clk_cpy_name(const char **dst_p, const char *src, bool must_exist)
return 0;
}

static int clk_core_populate_parent_map(struct clk_core *core)
static int clk_core_populate_parent_map(struct clk_core *core,
const struct clk_init_data *init)
{
const struct clk_init_data *init = core->hw->init;
u8 num_parents = init->num_parents;
const char * const *parent_names = init->parent_names;
const struct clk_hw **parent_hws = init->parent_hws;
Expand Down Expand Up @@ -3598,24 +3598,32 @@ __clk_register(struct device *dev, struct device_node *np, struct clk_hw *hw)
{
int ret;
struct clk_core *core;
const struct clk_init_data *init = hw->init;

/*
* The init data is not supposed to be used outside of registration path.
* Set it to NULL so that provider drivers can't use it either and so that
* we catch use of hw->init early on in the core.
*/
hw->init = NULL;

core = kzalloc(sizeof(*core), GFP_KERNEL);
if (!core) {
ret = -ENOMEM;
goto fail_out;
}

core->name = kstrdup_const(hw->init->name, GFP_KERNEL);
core->name = kstrdup_const(init->name, GFP_KERNEL);
if (!core->name) {
ret = -ENOMEM;
goto fail_name;
}

if (WARN_ON(!hw->init->ops)) {
if (WARN_ON(!init->ops)) {
ret = -EINVAL;
goto fail_ops;
}
core->ops = hw->init->ops;
core->ops = init->ops;

if (dev && pm_runtime_enabled(dev))
core->rpm_enabled = true;
Expand All @@ -3624,13 +3632,13 @@ __clk_register(struct device *dev, struct device_node *np, struct clk_hw *hw)
if (dev && dev->driver)
core->owner = dev->driver->owner;
core->hw = hw;
core->flags = hw->init->flags;
core->num_parents = hw->init->num_parents;
core->flags = init->flags;
core->num_parents = init->num_parents;
core->min_rate = 0;
core->max_rate = ULONG_MAX;
hw->core = core;

ret = clk_core_populate_parent_map(core);
ret = clk_core_populate_parent_map(core, init);
if (ret)
goto fail_parents;

Expand Down Expand Up @@ -4348,12 +4356,43 @@ void devm_of_clk_del_provider(struct device *dev)
}
EXPORT_SYMBOL(devm_of_clk_del_provider);

/*
* Beware the return values when np is valid, but no clock provider is found.
* If name == NULL, the function returns -ENOENT.
* If name != NULL, the function returns -EINVAL. This is because
* of_parse_phandle_with_args() is called even if of_property_match_string()
* returns an error.
/**
* of_parse_clkspec() - Parse a DT clock specifier for a given device node
* @np: device node to parse clock specifier from
* @index: index of phandle to parse clock out of. If index < 0, @name is used
* @name: clock name to find and parse. If name is NULL, the index is used
* @out_args: Result of parsing the clock specifier
*
* Parses a device node's "clocks" and "clock-names" properties to find the
* phandle and cells for the index or name that is desired. The resulting clock
* specifier is placed into @out_args, or an errno is returned when there's a
* parsing error. The @index argument is ignored if @name is non-NULL.
*
* Example:
*
* phandle1: clock-controller@1 {
* #clock-cells = <2>;
* }
*
* phandle2: clock-controller@2 {
* #clock-cells = <1>;
* }
*
* clock-consumer@3 {
* clocks = <&phandle1 1 2 &phandle2 3>;
* clock-names = "name1", "name2";
* }
*
* To get a device_node for `clock-controller@2' node you may call this
* function a few different ways:
*
* of_parse_clkspec(clock-consumer@3, -1, "name2", &args);
* of_parse_clkspec(clock-consumer@3, 1, NULL, &args);
* of_parse_clkspec(clock-consumer@3, 1, "name2", &args);
*
* Return: 0 upon successfully parsing the clock specifier. Otherwise, -ENOENT
* if @name is NULL or -EINVAL if @name is non-NULL and it can't be found in
* the "clock-names" property of @np.
*/
static int of_parse_clkspec(const struct device_node *np, int index,
const char *name, struct of_phandle_args *out_args)
Expand Down
6 changes: 6 additions & 0 deletions drivers/clk/imx/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -14,6 +14,12 @@ config CLK_IMX8MM
help
Build the driver for i.MX8MM CCM Clock Driver

config CLK_IMX8MN
bool "IMX8MN CCM Clock Driver"
depends on ARCH_MXC && ARM64
help
Build the driver for i.MX8MN CCM Clock Driver

config CLK_IMX8MQ
bool "IMX8MQ CCM Clock Driver"
depends on ARCH_MXC && ARM64
Expand Down
1 change: 1 addition & 0 deletions drivers/clk/imx/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -26,6 +26,7 @@ obj-$(CONFIG_MXC_CLK_SCU) += \
clk-lpcg-scu.o

obj-$(CONFIG_CLK_IMX8MM) += clk-imx8mm.o
obj-$(CONFIG_CLK_IMX8MN) += clk-imx8mn.o
obj-$(CONFIG_CLK_IMX8MQ) += clk-imx8mq.o
obj-$(CONFIG_CLK_IMX8QXP) += clk-imx8qxp.o clk-imx8qxp-lpcg.o

Expand Down
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