irqchip: dw-apb-ictl: Enable IRQ_GC_MASK_CACHE_PER_TYPE

The irq_chip_type instances have separate mask registers, so we need to enable IRQ_GC_MASK_CACHE_PER_TYPE to actually handle separate mask registers. Signed-off-by: Jisheng Zhang <[email protected]> Acked-by: Sebastian Hesselbarth <[email protected]> Link: https://lkml.kernel.org/r/[email protected] Signed-off-by: Jason Cooper <[email protected]>
ambv · Nov 26, 2014 · a9d5fcc · a9d5fcc
1 parent 8876ce7
commit a9d5fcc
Showing 1 changed file with 1 addition and 0 deletions.
diff --git a/drivers/irqchip/irq-dw-apb-ictl.c b/drivers/irqchip/irq-dw-apb-ictl.c
@@ -115,6 +115,7 @@ static int __init dw_apb_ictl_init(struct device_node *np,
 
 	ret = irq_alloc_domain_generic_chips(domain, 32, (nrirqs > 32) ? 2 : 1,
 					     np->name, handle_level_irq, clr, 0,
+					     IRQ_GC_MASK_CACHE_PER_TYPE |
 					     IRQ_GC_INIT_MASK_CACHE);
 	if (ret) {
 		pr_err("%s: unable to alloc irq domain gc\n", np->full_name);