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Merge tag 'powerpc-4.12-8' of git://git.kernel.org/pub/scm/linux/kern…
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…el/git/powerpc/linux

Pull powerpc fixes from Michael Ellerman:
 "Hopefully the last two powerpc fixes for 4.12.

  The CXL one is larger than I'd usually send at rc7, but it fixes new
  code this cycle, so better to have it working for the release. It was
  actually sent a few weeks back but got blocked in testing behind
  another fix that was causing issues.

  We are still tracking one crash in v4.12-rc7, but only one person has
  reproduced it and the commit identified by bisect doesn't touch any of
  the relevant code, so I think it's 50/50 whether that commit is
  actually the problem or it's some code layout / toolchain issue.

  Two fixes for code we merged this cycle:

   - cxl: Fixes for Coherent Accelerator Interface Architecture 2.0

   - Avoid miscompilation w/GCC 4.6.3 on 32-bit - don't inline
     copy_to/from_user()

  Thanks to Al Viro, Larry Finger, Christophe Lombard"

* tag 'powerpc-4.12-8' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
  powerpc/32: Avoid miscompilation w/GCC 4.6.3 - don't inline copy_to/from_user()
  cxl: Fixes for Coherent Accelerator Interface Architecture 2.0
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torvalds committed Jun 30, 2017
2 parents 27ab862 + d6bd819 commit b4df2e3
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Showing 7 changed files with 58 additions and 54 deletions.
8 changes: 1 addition & 7 deletions arch/powerpc/include/asm/uaccess.h
Original file line number Diff line number Diff line change
Expand Up @@ -267,13 +267,7 @@ do { \
extern unsigned long __copy_tofrom_user(void __user *to,
const void __user *from, unsigned long size);

#ifndef __powerpc64__

#define INLINE_COPY_FROM_USER
#define INLINE_COPY_TO_USER

#else /* __powerpc64__ */

#ifdef __powerpc64__
static inline unsigned long
raw_copy_in_user(void __user *to, const void __user *from, unsigned long n)
{
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6 changes: 3 additions & 3 deletions drivers/misc/cxl/context.c
Original file line number Diff line number Diff line change
Expand Up @@ -45,7 +45,7 @@ int cxl_context_init(struct cxl_context *ctx, struct cxl_afu *afu, bool master)
mutex_init(&ctx->mapping_lock);
ctx->mapping = NULL;

if (cxl_is_psl8(afu)) {
if (cxl_is_power8()) {
spin_lock_init(&ctx->sste_lock);

/*
Expand Down Expand Up @@ -189,7 +189,7 @@ int cxl_context_iomap(struct cxl_context *ctx, struct vm_area_struct *vma)
if (start + len > ctx->afu->adapter->ps_size)
return -EINVAL;

if (cxl_is_psl9(ctx->afu)) {
if (cxl_is_power9()) {
/*
* Make sure there is a valid problem state
* area space for this AFU.
Expand Down Expand Up @@ -324,7 +324,7 @@ static void reclaim_ctx(struct rcu_head *rcu)
{
struct cxl_context *ctx = container_of(rcu, struct cxl_context, rcu);

if (cxl_is_psl8(ctx->afu))
if (cxl_is_power8())
free_page((u64)ctx->sstp);
if (ctx->ff_page)
__free_page(ctx->ff_page);
Expand Down
18 changes: 5 additions & 13 deletions drivers/misc/cxl/cxl.h
Original file line number Diff line number Diff line change
Expand Up @@ -357,6 +357,7 @@ static const cxl_p2n_reg_t CXL_PSL_WED_An = {0x0A0};
#define CXL_PSL9_DSISR_An_PF_RGP 0x0000000000000090ULL /* PTE not found (Radix Guest (parent)) 0b10010000 */
#define CXL_PSL9_DSISR_An_PF_HRH 0x0000000000000094ULL /* PTE not found (HPT/Radix Host) 0b10010100 */
#define CXL_PSL9_DSISR_An_PF_STEG 0x000000000000009CULL /* PTE not found (STEG VA) 0b10011100 */
#define CXL_PSL9_DSISR_An_URTCH 0x00000000000000B4ULL /* Unsupported Radix Tree Configuration 0b10110100 */

/****** CXL_PSL_TFC_An ******************************************************/
#define CXL_PSL_TFC_An_A (1ull << (63-28)) /* Acknowledge non-translation fault */
Expand Down Expand Up @@ -844,24 +845,15 @@ static inline bool cxl_is_power8(void)

static inline bool cxl_is_power9(void)
{
/* intermediate solution */
if (!cxl_is_power8() &&
(cpu_has_feature(CPU_FTRS_POWER9) ||
cpu_has_feature(CPU_FTR_POWER9_DD1)))
if (pvr_version_is(PVR_POWER9))
return true;
return false;
}

static inline bool cxl_is_psl8(struct cxl_afu *afu)
static inline bool cxl_is_power9_dd1(void)
{
if (afu->adapter->caia_major == 1)
return true;
return false;
}

static inline bool cxl_is_psl9(struct cxl_afu *afu)
{
if (afu->adapter->caia_major == 2)
if ((pvr_version_is(PVR_POWER9)) &&
cpu_has_feature(CPU_FTR_POWER9_DD1))
return true;
return false;
}
Expand Down
23 changes: 15 additions & 8 deletions drivers/misc/cxl/fault.c
Original file line number Diff line number Diff line change
Expand Up @@ -187,24 +187,31 @@ static struct mm_struct *get_mem_context(struct cxl_context *ctx)

static bool cxl_is_segment_miss(struct cxl_context *ctx, u64 dsisr)
{
if ((cxl_is_psl8(ctx->afu)) && (dsisr & CXL_PSL_DSISR_An_DS))
if ((cxl_is_power8() && (dsisr & CXL_PSL_DSISR_An_DS)))
return true;

return false;
}

static bool cxl_is_page_fault(struct cxl_context *ctx, u64 dsisr)
{
if ((cxl_is_psl8(ctx->afu)) && (dsisr & CXL_PSL_DSISR_An_DM))
return true;
u64 crs; /* Translation Checkout Response Status */

if ((cxl_is_psl9(ctx->afu)) &&
((dsisr & CXL_PSL9_DSISR_An_CO_MASK) &
(CXL_PSL9_DSISR_An_PF_SLR | CXL_PSL9_DSISR_An_PF_RGC |
CXL_PSL9_DSISR_An_PF_RGP | CXL_PSL9_DSISR_An_PF_HRH |
CXL_PSL9_DSISR_An_PF_STEG)))
if ((cxl_is_power8()) && (dsisr & CXL_PSL_DSISR_An_DM))
return true;

if (cxl_is_power9()) {
crs = (dsisr & CXL_PSL9_DSISR_An_CO_MASK);
if ((crs == CXL_PSL9_DSISR_An_PF_SLR) ||
(crs == CXL_PSL9_DSISR_An_PF_RGC) ||
(crs == CXL_PSL9_DSISR_An_PF_RGP) ||
(crs == CXL_PSL9_DSISR_An_PF_HRH) ||
(crs == CXL_PSL9_DSISR_An_PF_STEG) ||
(crs == CXL_PSL9_DSISR_An_URTCH)) {
return true;
}
}

return false;
}

Expand Down
17 changes: 13 additions & 4 deletions drivers/misc/cxl/main.c
Original file line number Diff line number Diff line change
Expand Up @@ -329,8 +329,15 @@ static int __init init_cxl(void)

cxl_debugfs_init();

if ((rc = register_cxl_calls(&cxl_calls)))
goto err;
/*
* we don't register the callback on P9. slb callack is only
* used for the PSL8 MMU and CX4.
*/
if (cxl_is_power8()) {
rc = register_cxl_calls(&cxl_calls);
if (rc)
goto err;
}

if (cpu_has_feature(CPU_FTR_HVMODE)) {
cxl_ops = &cxl_native_ops;
Expand All @@ -347,7 +354,8 @@ static int __init init_cxl(void)

return 0;
err1:
unregister_cxl_calls(&cxl_calls);
if (cxl_is_power8())
unregister_cxl_calls(&cxl_calls);
err:
cxl_debugfs_exit();
cxl_file_exit();
Expand All @@ -366,7 +374,8 @@ static void exit_cxl(void)

cxl_debugfs_exit();
cxl_file_exit();
unregister_cxl_calls(&cxl_calls);
if (cxl_is_power8())
unregister_cxl_calls(&cxl_calls);
idr_destroy(&cxl_adapter_idr);
}

Expand Down
29 changes: 17 additions & 12 deletions drivers/misc/cxl/native.c
Original file line number Diff line number Diff line change
Expand Up @@ -105,11 +105,16 @@ static int native_afu_reset(struct cxl_afu *afu)
CXL_AFU_Cntl_An_RS_MASK | CXL_AFU_Cntl_An_ES_MASK,
false);

/* Re-enable any masked interrupts */
serr = cxl_p1n_read(afu, CXL_PSL_SERR_An);
serr &= ~CXL_PSL_SERR_An_IRQ_MASKS;
cxl_p1n_write(afu, CXL_PSL_SERR_An, serr);

/*
* Re-enable any masked interrupts when the AFU is not
* activated to avoid side effects after attaching a process
* in dedicated mode.
*/
if (afu->current_mode == 0) {
serr = cxl_p1n_read(afu, CXL_PSL_SERR_An);
serr &= ~CXL_PSL_SERR_An_IRQ_MASKS;
cxl_p1n_write(afu, CXL_PSL_SERR_An, serr);
}

return rc;
}
Expand Down Expand Up @@ -139,9 +144,9 @@ int cxl_psl_purge(struct cxl_afu *afu)

pr_devel("PSL purge request\n");

if (cxl_is_psl8(afu))
if (cxl_is_power8())
trans_fault = CXL_PSL_DSISR_TRANS;
if (cxl_is_psl9(afu))
if (cxl_is_power9())
trans_fault = CXL_PSL9_DSISR_An_TF;

if (!cxl_ops->link_ok(afu->adapter, afu)) {
Expand Down Expand Up @@ -603,7 +608,7 @@ static u64 calculate_sr(struct cxl_context *ctx)
if (!test_tsk_thread_flag(current, TIF_32BIT))
sr |= CXL_PSL_SR_An_SF;
}
if (cxl_is_psl9(ctx->afu)) {
if (cxl_is_power9()) {
if (radix_enabled())
sr |= CXL_PSL_SR_An_XLAT_ror;
else
Expand Down Expand Up @@ -1117,10 +1122,10 @@ static irqreturn_t native_handle_psl_slice_error(struct cxl_context *ctx,

static bool cxl_is_translation_fault(struct cxl_afu *afu, u64 dsisr)
{
if ((cxl_is_psl8(afu)) && (dsisr & CXL_PSL_DSISR_TRANS))
if ((cxl_is_power8()) && (dsisr & CXL_PSL_DSISR_TRANS))
return true;

if ((cxl_is_psl9(afu)) && (dsisr & CXL_PSL9_DSISR_An_TF))
if ((cxl_is_power9()) && (dsisr & CXL_PSL9_DSISR_An_TF))
return true;

return false;
Expand Down Expand Up @@ -1194,10 +1199,10 @@ static void native_irq_wait(struct cxl_context *ctx)
if (ph != ctx->pe)
return;
dsisr = cxl_p2n_read(ctx->afu, CXL_PSL_DSISR_An);
if (cxl_is_psl8(ctx->afu) &&
if (cxl_is_power8() &&
((dsisr & CXL_PSL_DSISR_PENDING) == 0))
return;
if (cxl_is_psl9(ctx->afu) &&
if (cxl_is_power9() &&
((dsisr & CXL_PSL9_DSISR_PENDING) == 0))
return;
/*
Expand Down
11 changes: 4 additions & 7 deletions drivers/misc/cxl/pci.c
Original file line number Diff line number Diff line change
Expand Up @@ -436,7 +436,7 @@ static int init_implementation_adapter_regs_psl9(struct cxl *adapter, struct pci
/* nMMU_ID Defaults to: b’000001001’*/
xsl_dsnctl |= ((u64)0x09 << (63-28));

if (cxl_is_power9() && !cpu_has_feature(CPU_FTR_POWER9_DD1)) {
if (!(cxl_is_power9_dd1())) {
/*
* Used to identify CAPI packets which should be sorted into
* the Non-Blocking queues by the PHB. This field should match
Expand Down Expand Up @@ -491,7 +491,7 @@ static int init_implementation_adapter_regs_psl9(struct cxl *adapter, struct pci
cxl_p1_write(adapter, CXL_PSL9_APCDEDTYPE, 0x40000003FFFF0000ULL);

/* Disable vc dd1 fix */
if ((cxl_is_power9() && cpu_has_feature(CPU_FTR_POWER9_DD1)))
if (cxl_is_power9_dd1())
cxl_p1_write(adapter, CXL_PSL9_GP_CT, 0x0400000000000001ULL);

return 0;
Expand Down Expand Up @@ -1439,8 +1439,7 @@ int cxl_pci_reset(struct cxl *adapter)
* The adapter is about to be reset, so ignore errors.
* Not supported on P9 DD1
*/
if ((cxl_is_power8()) ||
((cxl_is_power9() && !cpu_has_feature(CPU_FTR_POWER9_DD1))))
if ((cxl_is_power8()) || (!(cxl_is_power9_dd1())))
cxl_data_cache_flush(adapter);

/* pcie_warm_reset requests a fundamental pci reset which includes a
Expand Down Expand Up @@ -1750,7 +1749,6 @@ static const struct cxl_service_layer_ops psl9_ops = {
.debugfs_add_adapter_regs = cxl_debugfs_add_adapter_regs_psl9,
.debugfs_add_afu_regs = cxl_debugfs_add_afu_regs_psl9,
.psl_irq_dump_registers = cxl_native_irq_dump_regs_psl9,
.err_irq_dump_registers = cxl_native_err_irq_dump_regs,
.debugfs_stop_trace = cxl_stop_trace_psl9,
.write_timebase_ctrl = write_timebase_ctrl_psl9,
.timebase_read = timebase_read_psl9,
Expand Down Expand Up @@ -1889,8 +1887,7 @@ static void cxl_pci_remove_adapter(struct cxl *adapter)
* Flush adapter datacache as its about to be removed.
* Not supported on P9 DD1.
*/
if ((cxl_is_power8()) ||
((cxl_is_power9() && !cpu_has_feature(CPU_FTR_POWER9_DD1))))
if ((cxl_is_power8()) || (!(cxl_is_power9_dd1())))
cxl_data_cache_flush(adapter);

cxl_deconfigure_adapter(adapter);
Expand Down

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