formatting

Signed-off-by: Paul Zavalney <[email protected]>
andreaskurth · May 19, 2020 · 8ecd060 · 8ecd060
1 parent 3e8dd03
commit 8ecd060
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/cores/cv32e40p/user_manual/source/control_status_registers.rst b/cores/cv32e40p/user_manual/source/control_status_registers.rst
@@ -618,7 +618,7 @@ CV32E40P does not support the features requiring this register. Writes are ignor
 
 
 Machine Cycle Counter (mcycle)
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+-------------------------------------
 
 CSR Address: 0xB00