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R600: LDS instructions shouldn't implicitly define OQAP
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LDS instructions are pseudo instructions which model
the OQAP defs and uses within a single instruction.

This fixes a hang in the opencv MedianFilter tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203818 91177308-0d34-0410-b5e6-96231b3b80d8
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tstellarAMD committed Mar 13, 2014
1 parent d2a816f commit 47feea0
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Showing 2 changed files with 28 additions and 2 deletions.
2 changes: 0 additions & 2 deletions lib/Target/R600/R600Instructions.td
Original file line number Diff line number Diff line change
Expand Up @@ -1648,7 +1648,6 @@ class R600_LDS_1A <bits<6> lds_op, string name, list<dag> pattern> : R600_LDS <
let src2 = 0;
let src2_rel = 0;

let Defs = [OQAP];
let usesCustomInserter = 1;
let LDS_1A = 1;
let DisableEncoding = "$dst";
Expand Down Expand Up @@ -1684,7 +1683,6 @@ class R600_LDS_1A1D_RET <bits<6> lds_op, string name, list<dag> pattern> :
let BaseOp = name;
let usesCustomInserter = 1;
let DisableEncoding = "$dst";
let Defs = [OQAP];
}

class R600_LDS_1A2D <bits<6> lds_op, string name, list<dag> pattern> :
Expand Down
28 changes: 28 additions & 0 deletions test/CodeGen/R600/lds-oqap-crash.ll
Original file line number Diff line number Diff line change
@@ -0,0 +1,28 @@
; RUN: llc < %s -march=r600 -mcpu=redwood -verify-machineinstrs | FileCheck %s

; The test is for a bug in R600EmitClauseMarkers.cpp where this pass
; was searching for a use of the OQAP register in order to determine
; if an LDS instruction could fit in the current clause, but never finding
; one. This created an infinite loop and hung the compiler.
;
; The LDS instruction should not have been defining OQAP in the first place,
; because the LDS instructions are pseudo instructions and the OQAP
; reads and writes are bundled together in the same instruction.

; CHECK: @lds_crash
define void @lds_crash(i32 addrspace(1)* %out, i32 addrspace(3)* %in, i32 %a, i32 %b, i32 %c) {
entry:
%0 = load i32 addrspace(3)* %in
; This block needs to be > 115 ISA instructions to hit the bug,
; so we'll use udiv instructions.
%div0 = udiv i32 %0, %b
%div1 = udiv i32 %div0, %a
%div2 = udiv i32 %div1, 11
%div3 = udiv i32 %div2, %a
%div4 = udiv i32 %div3, %b
%div5 = udiv i32 %div4, %c
%div6 = udiv i32 %div5, %div0
%div7 = udiv i32 %div6, %div1
store i32 %div7, i32 addrspace(1)* %out
ret void
}

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