Text and supporting code for Modeling and Simulation in Python

🔮 ChatGPT Desktop Application (Mac, Windows and Linux)

L7 R5: RDA Cortex-A5 LTE Cat1 SoC (UIS8910DM/RDA8910)

L4 R3: ASR Cortex-R5 LTE Cat.1 SoC (ASR1601/ASR1603/ASR3601)

Yosys Open SYnthesis Suite

The RIFFA development repository

Open source FPGA-based NIC and platform for in-network compute

LAV Filters - Open-Source DirectShow Media Splitter and Decoders

OpenTitan: Open source silicon root of trust

This is the top-level project for the PULP Platform. It instantiates a PULP open-source system with a PULP SoC (microcontroller) domain accelerated by a PULP cluster with 8 cores.

Digital timing diagram editor

Nuclei RISC-V Software Development Kit

PSA-ADAC SDC-600 Secure Debug Manager library for authenticated debug

Driver stack (including user space libraries, kernel module and firmware) for the Arm® Ethos™-N NPU

Coresight Access Library

TrustZone True Number Generator

CMSIS Version 5 Development Repository

AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

Icarus Verilog

Pulp 3 pulpcore package https://pypi.org/project/pulpcore/