drm/i915: Clamp efficient frequency to valid range

The efficient frequency (RPe) should stay in the range RPn <= RPe <= RP0. The pcode clamps the returned value internally on Broadwell but not on Haswell. Fix for missing range check in commit 93ee292 Author: Tom O'Rourke <Tom.O'[email protected]> Date: Wed Nov 19 14:21:52 2014 -0800 drm/i915: Use efficient frequency for HSW/BDW Reference: http://lists.freedesktop.org/archives/intel-gfx/2015-February/059802.html Reported-by: Michael Auchter <[email protected]> Suggested-by: Chris Wilson <[email protected]> Cc: [email protected] # v3.19 Signed-off-by: Tom O'Rourke <Tom.O'[email protected]> Signed-off-by: Jani Nikula <[email protected]>
arunthomas · Feb 11, 2015 · 46efa4a · 46efa4a
1 parent a8b3d52
commit 46efa4a
Showing 1 changed file with 4 additions and 1 deletion.
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
@@ -4005,7 +4005,10 @@ static void gen6_init_rps_frequencies(struct drm_device *dev)
 					&ddcc_status);
 		if (0 == ret)
 			dev_priv->rps.efficient_freq =
-				(ddcc_status >> 8) & 0xff;
+				clamp_t(u8,
+					((ddcc_status >> 8) & 0xff),
+					dev_priv->rps.min_freq,
+					dev_priv->rps.max_freq);
 	}
 
 	/* Preserve min/max settings in case of re-init */