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MIPS: IP32: use generic dma noncoherent ops
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Provide phys_to_dma/dma_to_phys helpers, everything else is generic.

Signed-off-by: Christoph Hellwig <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/19546/
Signed-off-by: Paul Burton <[email protected]>
Cc: Florian Fainelli <[email protected]>
Cc: David Daney <[email protected]>
Cc: Kevin Cernekee <[email protected]>
Cc: Jiaxun Yang <[email protected]>
Cc: Tom Bogendoerfer <[email protected]>
Cc: Huacai Chen <[email protected]>
Cc: [email protected]
Cc: [email protected]
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Christoph Hellwig authored and paulburton committed Jun 24, 2018
1 parent e905086 commit 03df822
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Showing 4 changed files with 39 additions and 94 deletions.
2 changes: 1 addition & 1 deletion arch/mips/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -726,6 +726,7 @@ config SGI_IP28

config SGI_IP32
bool "SGI IP32 (O2)"
select ARCH_HAS_PHYS_TO_DMA
select FW_ARC
select FW_ARC32
select BOOT_ELF32
Expand All @@ -734,7 +735,6 @@ config SGI_IP32
select DMA_NONCOHERENT
select HW_HAS_PCI
select IRQ_MIPS_CPU
select MIPS_DMA_DEFAULT
select R5000_CPU_SCACHE
select RM7000_CPU_SCACHE
select SYS_HAS_CPU_R5000
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92 changes: 0 additions & 92 deletions arch/mips/include/asm/mach-ip32/dma-coherence.h

This file was deleted.

2 changes: 1 addition & 1 deletion arch/mips/sgi-ip32/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -4,4 +4,4 @@
#

obj-y += ip32-berr.o ip32-irq.o ip32-platform.o ip32-setup.o ip32-reset.o \
crime.o ip32-memory.o
crime.o ip32-memory.o ip32-dma.o
37 changes: 37 additions & 0 deletions arch/mips/sgi-ip32/ip32-dma.c
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@@ -0,0 +1,37 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2006 Ralf Baechle <[email protected]>
*/
#include <linux/dma-direct.h>
#include <asm/ip32/crime.h>

/*
* Few notes.
* 1. CPU sees memory as two chunks: 0-256M@0x0, and the rest @0x40000000+256M
* 2. PCI sees memory as one big chunk @0x0 (or we could use 0x40000000 for
* native-endian)
* 3. All other devices see memory as one big chunk at 0x40000000
* 4. Non-PCI devices will pass NULL as struct device*
*
* Thus we translate differently, depending on device.
*/

#define RAM_OFFSET_MASK 0x3fffffffUL

dma_addr_t __phys_to_dma(struct device *dev, phys_addr_t paddr)
{
dma_addr_t dma_addr = paddr & RAM_OFFSET_MASK;

if (!dev)
dma_addr += CRIME_HI_MEM_BASE;
return dma_addr;
}

phys_addr_t __dma_to_phys(struct device *dev, dma_addr_t dma_addr)
{
phys_addr_t paddr = dma_addr & RAM_OFFSET_MASK;

if (dma_addr >= 256*1024*1024)
paddr += CRIME_HI_MEM_BASE;
return paddr;
}

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