rtlwifi: checkpatch fixes

Signed-off-by: Christian Lamparter <[email protected]>

rtlwifi/rtl8192s/def_common.h

@@ -66,7 +66,7 @@
 	(*(__le32 *)(__pdesc) =					\
 	(cpu_to_le32((le32_to_cpu(*((__le32 *)(__pdesc))) &	\
 	(~(BIT_OFFSET_LEN_MASK_32((__shift), __len)))) |	\
-	(((u32)(__val) & BIT_LEN_MASK_32(__len)) << (__shift)))));
+	(((u32)(__val) & BIT_LEN_MASK_32(__len)) << (__shift)))))
 
 /* macros to read/write various fields in RX or TX descriptors */
 

rtlwifi/rtl8192s/dm_common.c

@@ -142,6 +142,7 @@ static void _rtl92s_dm_check_edca_turbo(struct ieee80211_hw *hw)
 	} else {
 		if (rtlpriv->dm.current_turbo_edca) {
 			u8 tmp = AC0_BE;
+
 			rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_AC_PARAM,
 						      &tmp);
 			rtlpriv->dm.current_turbo_edca = false;

rtlwifi/rtl8192s/fw_common.h

@@ -346,12 +346,12 @@ enum fw_h2c_cmd {
 	} while (0)
 
 #define FW_CMD_IO_UPDATE(rtlpriv, _val)				\
-	rtlpriv->rtlhal.fwcmd_iomap = _val;
+	rtlpriv->rtlhal.fwcmd_iomap = _val
 
-#define FW_CMD_IO_SET(rtlpriv, _val)				\
-	do {							\
+#define FW_CMD_IO_SET(rtlpriv, _val)					\
+	do {								\
 		rtl_write_word(rtlpriv, LBUS_MON_ADDR, (u16)_val);	\
-		FW_CMD_IO_UPDATE(rtlpriv, _val);		\
+		FW_CMD_IO_UPDATE(rtlpriv, _val);			\
 	} while (0)
 
 #define FW_CMD_PARA_SET(rtlpriv, _val)				\

rtlwifi/rtl8192s/hw_common.c

@@ -46,6 +46,7 @@ void rtl92s_get_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
 	switch (variable) {
 	case HW_VAR_RCR: {
 			struct rtl_pci *rtlpci;
+
 			if (IS_HARDWARE_TYPE_8192SE(rtlhal)) {
 				rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 				*((u32 *) (val)) = rtlpci->receive_config;
@@ -91,6 +92,7 @@ EXPORT_SYMBOL_GPL(rtl92s_get_hw_reg);
 void rtl92s_set_mac_addr(struct ieee80211_hw *hw, const u8 *addr)
 {
 	struct rtl_priv *rtlpriv = rtl_priv(hw);
+
 	rtl_write_dword(rtlpriv, REG_MACID, *((u32 *)addr));
 	rtl_write_word(rtlpriv, REG_MACID + 4, *((u16 *)(addr + 4)));
 }
@@ -161,6 +163,7 @@ void rtl92s_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
 	case HW_VAR_ACK_PREAMBLE:{
 			u8 reg_tmp;
 			u8 short_preamble = (bool) (*val);
+
 			reg_tmp = (mac->cur_40_prime_sc) << 5;
 			if (short_preamble)
 				reg_tmp |= 0x80;
@@ -262,6 +265,7 @@ void rtl92s_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
 			rtl92s_dm_init_edca_turbo(hw);
 			if (IS_HARDWARE_TYPE_8192SE(rtlhal)) {
 				u8 e_aci = *val;
+
 				rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 
 				if (rtlpci->acm_method != EACMWAY2_SW) {
@@ -565,6 +569,7 @@ int rtl92s_set_media_status(struct ieee80211_hw *hw,
 	struct rtl_priv *rtlpriv = rtl_priv(hw);
 	u8 bt_msr = rtl_read_byte(rtlpriv, MSR);
 	u32 temp;
+
 	bt_msr &= ~MSR_LINK_MASK;
 
 	switch (type) {
@@ -612,6 +617,7 @@ EXPORT_SYMBOL_GPL(rtl92s_set_media_status);
 void rtl92s_set_qos(struct ieee80211_hw *hw, int aci)
 {
 	struct rtl_priv *rtlpriv = rtl_priv(hw);
+
 	rtl92s_dm_init_edca_turbo(hw);
 
 	switch (aci) {
@@ -642,7 +648,6 @@ void rtl92s_phy_set_rfhalt(struct ieee80211_hw *hw)
 	u8 u1btmp;
 	u16 tmpu2b;
 
-
 	if (IS_HARDWARE_TYPE_8192SU(rtlhal)) {
 		rtl_write_word(rtlpriv, REG_CR, 0x0);
 		rtl_write_byte(rtlpriv, REG_RF_CTRL, 0x00);
@@ -726,9 +731,9 @@ void rtl92s_phy_set_rfhalt(struct ieee80211_hw *hw)
 	/* SW/HW radio off or halt adapter!! For example S3/S4 */
 	} else {
 		/* LED function disable. Power range is about 8mA now. */
-		/* if write 0xF1 disconnet_pci power
+		/* if write 0xF1 disconnect_pci power
 		 *	 ifconfig wlan0 down power are both high 35:70 */
-		/* if write oxF9 disconnet_pci power
+		/* if write oxF9 disconnect_pci power
 		 * ifconfig wlan0 down power are both low  12:45*/
 		rtl_write_byte(rtlpriv, 0x03, 0xF9);
 	}
@@ -1165,7 +1170,7 @@ void rtl92s_update_channel_access_setting(struct ieee80211_hw *hw)
 EXPORT_SYMBOL_GPL(rtl92s_update_channel_access_setting);
 
 /* Is_wepkey just used for WEP used as group & pairwise key
- * if pairwise is AES ang group is WEP Is_wepkey == false.*/
+ * if pairwise is AES and group is WEP Is_wepkey == false.*/
 void rtl92s_set_key(struct ieee80211_hw *hw, u32 key_index, u8 *p_macaddr,
 	bool is_group, u8 enc_algo, bool is_wepkey, bool clear_all)
 {

rtlwifi/rtl8192s/phy_common.c

@@ -50,6 +50,7 @@ static u32 _rtl92s_phy_calculate_bit_shift(u32 bitmask)
 static void _rtl92su_phy_bb_ready(struct rtl_priv *rtlpriv)
 {
 	unsigned int pollingcount = 100;
+
 	do {
 		/* Make sure that access could be done. */
 		if ((rtl_read_byte(rtlpriv, REG_PHY_REG_RPT) & BIT(0)) == 0)
@@ -178,6 +179,7 @@ static u32 _rtl92su_phy_rf_serial_read(struct ieee80211_hw *hw,
 				       enum radio_path rfpath, u32 offset)
 {
 	struct rtl_priv *rtlpriv = rtl_priv(hw);
+
 	offset &= 0x3f;
 
 	rtl_write_dword(rtlpriv, REG_RF_BB_CMD_ADDR, 0xF0000002 |
@@ -472,13 +474,12 @@ static bool _rtl92s_phy_sw_chnl_step_by_step(struct ieee80211_hw *hw,
 		}
 
 		if (currentcmd->cmdid == CMDID_END) {
-			if ((*stage) == 2) {
+			if ((*stage) == 2)
 				return true;
-			} else {
-				(*stage)++;
-				(*step) = 0;
-				continue;
-			}
+
+			(*stage)++;
+			(*step) = 0;
+			continue;
 		}
 
 		switch (currentcmd->cmdid) {
@@ -641,6 +642,7 @@ bool rtl92s_phy_set_rf_power_state(struct ieee80211_hw *hw,
 
 				bool rtstatus;
 				u32 InitializeCount = 0;
+
 				do {
 					InitializeCount++;
 					RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
@@ -652,7 +654,7 @@ bool rtl92s_phy_set_rf_power_state(struct ieee80211_hw *hw,
 						  RT_RF_OFF_LEVL_HALT_NIC);
 			} else {
 				RT_TRACE(rtlpriv, COMP_POWER, DBG_DMESG,
-					 "awake, sleeped:%d ms state_inap:%x\n",
+					 "awake, slept:%d ms state_inap:%x\n",
 					 jiffies_to_msecs(jiffies -
 							  ppsc->
 							  last_sleep_jiffies),
@@ -694,6 +696,7 @@ bool rtl92s_phy_set_rf_power_state(struct ieee80211_hw *hw,
 			for (queue_id = 0, i = 0;
 			     queue_id < RTL_PCI_MAX_TX_QUEUE_COUNT;) {
 				struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
+
 				ring = &pcipriv->dev.tx_ring[queue_id];
 				if (skb_queue_len(&ring->queue) == 0 ||
 					queue_id == BEACON_QUEUE) {
@@ -820,7 +823,7 @@ static void _rtl92s_phy_init_register_definition(struct ieee80211_hw *hw)
 	rtlphy->phyreg_def[RF90_PATH_C].rfintfe = RFPGA0_XC_RFINTERFACEOE;
 	rtlphy->phyreg_def[RF90_PATH_D].rfintfe = RFPGA0_XD_RFINTERFACEOE;
 
-	/* Addr of LSSI. Wirte RF register by driver */
+	/* Addr of LSSI. Write RF register by driver */
 	rtlphy->phyreg_def[RF90_PATH_A].rf3wire_offset =
 						 RFPGA0_XA_LSSIPARAMETER;
 	rtlphy->phyreg_def[RF90_PATH_B].rf3wire_offset =
@@ -1533,6 +1536,7 @@ bool rtl92s_phy_set_fw_cmd(struct ieee80211_hw *hw, enum fwcmd_iotype fw_cmdio)
 			break;
 		case FW_CMD_TXPWR_TRACK_THERMAL: {
 			u8	thermalval = 0;
+
 			fw_cmdmap |= FW_PWR_TRK_CTL;
 
 			/* Clear FW parameter in terms of thermal parts. */

rtlwifi/rtl8192se/hw.c

@@ -250,8 +250,8 @@ static void _rtl92se_macconfig_before_fwdownload(struct ieee80211_hw *hw)
 		struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 		struct rtl_led *pLed0 = &(pcipriv->ledctl.sw_led0);
 		enum rf_pwrstate rfpwr_state_toset;
-		rfpwr_state_toset = rtl92s_rf_onoff_detect(hw);
 
+		rfpwr_state_toset = rtl92s_rf_onoff_detect(hw);
 		if (rfpwr_state_toset == ERFON)
 			rtl92s_sw_led_on(hw, pLed0);
 	}
@@ -478,8 +478,7 @@ int rtl92se_hw_init(struct ieee80211_hw *hw)
 	rtstatus = rtl92s_download_fw(hw);
 	if (!rtstatus) {
 		RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
-			 "Failed to download FW. Init HW without FW now... "
-			 "Please copy FW into /lib/firmware/rtlwifi\n");
+			 "Failed to download FW. Init HW without FW now... Please copy FW into /lib/firmware/rtlwifi\n");
 		err = 1;
 		goto exit;
 	}
@@ -500,7 +499,7 @@ int rtl92se_hw_init(struct ieee80211_hw *hw)
 
 	/* because last function modify RCR, so we update
 	 * rcr var here, or TP will unstable for receive_config
-	 * is wrong, RX RCR_ACRC32 will cause TP unstabel & Rx
+	 * is wrong, RX RCR_ACRC32 will cause TP unstable & Rx
 	 * RCR_APP_ICV will cause mac80211 unassoc for cisco 1252
 	 */
 	rtlpci->receive_config = rtl_read_dword(rtlpriv, RCR);
@@ -923,11 +922,11 @@ bool rtl92se_gpio_radio_on_off_checking(struct ieee80211_hw *hw, u8 *valid)
 	if (ppsc->rfchange_inprogress) {
 		spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag);
 		return false;
-	} else {
-		ppsc->rfchange_inprogress = true;
-		spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag);
 	}
 
+	ppsc->rfchange_inprogress = true;
+	spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag);
+
 	/* cur_rfstate = ppsc->rfpwr_state;*/
 
 	/* because after _rtl92s_phy_set_rfhalt, all power
@@ -1035,13 +1034,11 @@ void rtl92se_read_eeprom_info(struct ieee80211_hw *hw)
 		RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
 			 "EEPROM ID(%#x) is invalid!!\n", eeprom_id);
 		rtlefuse->autoload_failflag = true;
-	} else {
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "Autoload OK\n");
-		rtlefuse->autoload_failflag = false;
+		return;
 	}
 
-	if (rtlefuse->autoload_failflag)
-		return;
+	RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "Autoload OK\n");
+	rtlefuse->autoload_failflag = false;
 
 	rtl92s_get_IC_Inferiority(hw);
 
@@ -1335,6 +1332,6 @@ void rtl92se_read_eeprom_info(struct ieee80211_hw *hw)
 	RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "EEPROM Customer ID: 0x%2x",
 		 rtlefuse->eeprom_oemid);
 
-	/* set channel paln to world wide 13 */
+	/* set channel plan to world wide 13 */
 	rtlefuse->channel_plan = COUNTRY_CODE_WORLD_WIDE_13;
 }

rtlwifi/rtl8192se/led.c

@@ -40,6 +40,7 @@ static void _rtl92se_init_led(struct ieee80211_hw *hw,
 void rtl92se_init_sw_leds(struct ieee80211_hw *hw)
 {
 	struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
+
 	_rtl92se_init_led(hw, &(pcipriv->ledctl.sw_led0), LED_PIN_LED0);
 	_rtl92se_init_led(hw, &(pcipriv->ledctl.sw_led1), LED_PIN_LED1);
 }
@@ -49,6 +50,7 @@ static void _rtl92se_sw_led_control(struct ieee80211_hw *hw,
 {
 	struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 	struct rtl_led *pLed0 = &(pcipriv->ledctl.sw_led0);
+
 	switch (ledaction) {
 	case LED_CTL_POWER_ON:
 	case LED_CTL_LINK:
@@ -82,4 +84,3 @@ void rtl92se_led_control(struct ieee80211_hw *hw, enum led_ctl_mode ledaction)
 
 	_rtl92se_sw_led_control(hw, ledaction);
 }
-

rtlwifi/rtl8192se/sw.c

@@ -53,7 +53,7 @@ static void rtl92s_init_aspm_vars(struct ieee80211_hw *hw)
 	 * 2 - Enable ASPM with Clock Req,
 	 * 3 - Alwyas Enable ASPM with Clock Req,
 	 * 4 - Always Enable ASPM without Clock Req.
-	 * set defult to RTL8192CE:3 RTL8192E:2
+	 * set default to RTL8192CE:3 RTL8192E:2
 	 * */
 	rtlpci->const_pci_aspm = 2;
 

rtlwifi/rtl8192se/trx.c

@@ -78,6 +78,7 @@ static void _rtl92se_query_rxphystatus(struct ieee80211_hw *hw,
 
 	if (is_cck) {
 		u8 report, cck_highpwr;
+
 		cck_buf = (struct phy_sts_cck_8192s_t *)p_drvinfo;
 
 		if (ppsc->rfpwr_state == ERFON)
@@ -89,6 +90,7 @@ static void _rtl92se_query_rxphystatus(struct ieee80211_hw *hw,
 
 		if (!cck_highpwr) {
 			u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
+
 			report = cck_buf->cck_agc_rpt & 0xc0;
 			report = report >> 6;
 			switch (report) {
@@ -107,6 +109,7 @@ static void _rtl92se_query_rxphystatus(struct ieee80211_hw *hw,
 			}
 		} else {
 			u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
+
 			report = p_drvinfo->cfosho[0] & 0x60;
 			report = report >> 5;
 			switch (report) {
@@ -147,6 +150,7 @@ static void _rtl92se_query_rxphystatus(struct ieee80211_hw *hw,
 
 		if (packet_match_bssid) {
 			u8 sq;
+
 			if (pstats->rx_pwdb_all > 40) {
 				sq = 100;
 			} else {
@@ -219,7 +223,6 @@ static void _rtl92se_translate_rx_signal_stuff(struct ieee80211_hw *hw,
 {
 	struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 	struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
-
 	struct ieee80211_hdr *hdr;
 	u8 *tmp_buf;
 	u8 *praddr;
@@ -298,7 +301,7 @@ bool rtl92se_rx_query_desc(struct ieee80211_hw *hw, struct rtl_stats *stats,
 
 	/* hw will set stats->decrypted true, if it finds the
 	 * frame is open data frame or mgmt frame,
-	 * hw will not decrypt robust managment frame
+	 * hw will not decrypt robust management frame
 	 * for IEEE80211w but still set stats->decrypted
 	 * true, so here we should set it back to undecrypted
 	 * for IEEE80211w frame, and mac80211 sw will help
@@ -487,7 +490,7 @@ void rtl92se_tx_fill_desc(struct ieee80211_hw *hw,
 		/* Alwasy enable all rate fallback range */
 		SET_TX_DESC_DATA_RATE_FB_LIMIT(pdesc, 0x1F);
 
-		/* Fix: I don't kown why hw use 6.5M to tx when set it */
+		/* Fix: I don't know why hw use 6.5M to tx when set it */
 		SET_TX_DESC_USER_RATE(pdesc,
 				      ptcb_desc->use_driver_rate ? 1 : 0);
 
@@ -649,6 +652,7 @@ u32 rtl92se_get_desc(u8 *desc, bool istx, u8 desc_name)
 void rtl92se_tx_polling(struct ieee80211_hw *hw, u8 hw_queue)
 {
 	struct rtl_priv *rtlpriv = rtl_priv(hw);
+
 	rtl_write_word(rtlpriv, TP_POLL, BIT(0) << (hw_queue));
 }