[tsan] Suppress a benign race during metadata cache lookup

This data race is benign and should not occur on the platforms we currently care about. However, do set the ordering appropriately when built with TSan to avoid reporting races from Swift code. The metadata lookup code relies on these orderings for synchronization.

lib/IRGen/GenMeta.cpp

@@ -1085,6 +1085,10 @@ void irgen::emitLazyCacheAccessFunction(IRGenModule &IGM,
   // FIXME: Technically should be "consume", but that introduces barriers in the
   // current LLVM ARM backend.
   auto load = IGF.Builder.CreateLoad(cache);
+  // Make this barrier explicit when building for TSan to avoid false positives.
+  if (IGM.Opts.Sanitize == SanitizerKind::Thread)
+    load->setOrdering(llvm::AtomicOrdering::Acquire);
+
 
   // Compare the load result against null.
   auto isNullBB = IGF.createBasicBlock("cacheIsNull");