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3 stars written in Verilog
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nvdla / hw

RTL, Cmodel, and testbench for NVDLA

Verilog 1,765 572 Updated Mar 2, 2022

OpenTimer / OpenTimer

A High-performance Timing Analysis Tool for VLSI Systems

Verilog 577 144 Updated May 26, 2023

jeras / verilog_coding_style

Verilog coding style examples

Verilog 3 1 Updated Jul 11, 2013