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PCI: xilinx-nwl: Use irq_data_get_irq_chip_data()
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[ Upstream commit e56427068a8d796bb7b8e297f2b6e947380e383f ]

Going through a full irq descriptor lookup instead of just using the proper
helper function which provides direct access is suboptimal.

In fact it _is_ wrong because the chip callback needs to get the chip data
which is relevant for the chip while using the irq descriptor variant
returns the irq chip data of the top level chip of a hierarchy. It does not
matter in this case because the chip is the top level chip, but that
doesn't make it more correct.

Signed-off-by: Thomas Gleixner <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Cc: Bjorn Helgaas <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Stable-dep-of: 0199d2f2bd8c ("PCI: xilinx-nwl: Fix off-by-one in INTx IRQ handler")
Signed-off-by: Sasha Levin <[email protected]>
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KAGA-KOKO authored and gregkh committed Oct 17, 2024
1 parent 46c4079 commit 6dacc0b
Showing 1 changed file with 2 additions and 6 deletions.
8 changes: 2 additions & 6 deletions drivers/pci/controller/pcie-xilinx-nwl.c
Original file line number Diff line number Diff line change
Expand Up @@ -381,13 +381,11 @@ static void nwl_pcie_msi_handler_low(struct irq_desc *desc)

static void nwl_mask_leg_irq(struct irq_data *data)
{
struct irq_desc *desc = irq_to_desc(data->irq);
struct nwl_pcie *pcie;
struct nwl_pcie *pcie = irq_data_get_irq_chip_data(data);
unsigned long flags;
u32 mask;
u32 val;

pcie = irq_desc_get_chip_data(desc);
mask = 1 << (data->hwirq - 1);
raw_spin_lock_irqsave(&pcie->leg_mask_lock, flags);
val = nwl_bridge_readl(pcie, MSGF_LEG_MASK);
Expand All @@ -397,13 +395,11 @@ static void nwl_mask_leg_irq(struct irq_data *data)

static void nwl_unmask_leg_irq(struct irq_data *data)
{
struct irq_desc *desc = irq_to_desc(data->irq);
struct nwl_pcie *pcie;
struct nwl_pcie *pcie = irq_data_get_irq_chip_data(data);
unsigned long flags;
u32 mask;
u32 val;

pcie = irq_desc_get_chip_data(desc);
mask = 1 << (data->hwirq - 1);
raw_spin_lock_irqsave(&pcie->leg_mask_lock, flags);
val = nwl_bridge_readl(pcie, MSGF_LEG_MASK);
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