soc: arm: add support for FlexSPI1 clock configuration for NXP RT5xx

Add support for configuring FlexSPI1 clock speed to RT5xx soc initialization, so that memory present on FlexSPI1 can be accessed. Note that FlexSPI1 is referred to as FlexSPI2 in the dts files for this SOC. Signed-off-by: Daniel DeGrasse <[email protected]>
benys · Jan 4, 2023 · 1af8f27 · 1af8f27
1 parent 64a14a8
commit 1af8f27
Showing 1 changed file with 11 additions and 0 deletions.
diff --git a/soc/arm/nxp_imx/rt5xx/soc.c b/soc/arm/nxp_imx/rt5xx/soc.c
@@ -313,6 +313,17 @@ static void clock_init(void)
 	flexspi_setup_clock(FLEXSPI0, 0U, 2U);
 #endif
 
+#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(flexspi2), nxp_imx_flexspi, okay)
+	/* Power up FlexSPI1 SRAM */
+	POWER_DisablePD(kPDRUNCFG_APD_FLEXSPI1_SRAM);
+	POWER_DisablePD(kPDRUNCFG_PPD_FLEXSPI1_SRAM);
+	POWER_ApplyPD();
+	/* Setup clock frequency for FlexSPI1 */
+	CLOCK_AttachClk(kMAIN_CLK_to_FLEXSPI1_CLK);
+	CLOCK_SetClkDiv(kCLOCK_DivFlexspi1Clk, 1);
+	/* Reset peripheral module */
+	RESET_PeripheralReset(kFLEXSPI1_RST_SHIFT_RSTn);
+#endif
 	/* Set SystemCoreClock variable. */
 	SystemCoreClock = CLOCK_INIT_CORE_CLOCK;