dt-bindings: reset: ocelot: Add Luton and Jaguar2 support

This adds the support for 2 others MIPS based VCore III SoCs: Luton and Jaguar2. Signed-off-by: Gregory CLEMENT <[email protected]> Signed-off-by: Sebastian Reichel <[email protected]>
berg · Nov 29, 2020 · 01b8f5b · 01b8f5b
1 parent 3650b22
commit 01b8f5b
Showing 1 changed file with 3 additions and 1 deletion.
diff --git a/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt b/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt
@@ -7,7 +7,9 @@ The reset registers are both present in the MSCC vcoreiii MIPS and
 microchip Sparx5 armv8 SoC's.
 
 Required Properties:
- - compatible: "mscc,ocelot-chip-reset" or "microchip,sparx5-chip-reset"
+
+ - compatible: "mscc,ocelot-chip-reset", "mscc,luton-chip-reset",
+   "mscc,jaguar2-chip-reset" or "microchip,sparx5-chip-reset"
 
 Example:
 	reset@1070008 {