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drm/tegra: Move drm_dp_link helpers to Tegra DRM
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During the discussion of patches that enhance the drm_dp_link helpers it
was concluded that these helpers aren't very useful to begin with. After
all other drivers have been converted not to use these helpers anymore,
move these helpers into the last remaining user: Tegra DRM.

If at some point these helpers are deemed more widely useful, they can
be moved out into the DRM DP helpers again.

Signed-off-by: Thierry Reding <[email protected]>
Reviewed-by: Daniel Vetter <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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thierryreding committed Oct 23, 2019
1 parent 2589c40 commit 9a42c7c
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Showing 7 changed files with 162 additions and 144 deletions.
128 changes: 0 additions & 128 deletions drivers/gpu/drm/drm_dp_helper.c
Original file line number Diff line number Diff line change
Expand Up @@ -351,134 +351,6 @@ int drm_dp_dpcd_read_link_status(struct drm_dp_aux *aux,
}
EXPORT_SYMBOL(drm_dp_dpcd_read_link_status);

/**
* drm_dp_link_probe() - probe a DisplayPort link for capabilities
* @aux: DisplayPort AUX channel
* @link: pointer to structure in which to return link capabilities
*
* The structure filled in by this function can usually be passed directly
* into drm_dp_link_power_up() and drm_dp_link_configure() to power up and
* configure the link based on the link's capabilities.
*
* Returns 0 on success or a negative error code on failure.
*/
int drm_dp_link_probe(struct drm_dp_aux *aux, struct drm_dp_link *link)
{
u8 values[3];
int err;

memset(link, 0, sizeof(*link));

err = drm_dp_dpcd_read(aux, DP_DPCD_REV, values, sizeof(values));
if (err < 0)
return err;

link->revision = values[0];
link->rate = drm_dp_bw_code_to_link_rate(values[1]);
link->num_lanes = values[2] & DP_MAX_LANE_COUNT_MASK;

if (values[2] & DP_ENHANCED_FRAME_CAP)
link->capabilities |= DP_LINK_CAP_ENHANCED_FRAMING;

return 0;
}
EXPORT_SYMBOL(drm_dp_link_probe);

/**
* drm_dp_link_power_up() - power up a DisplayPort link
* @aux: DisplayPort AUX channel
* @link: pointer to a structure containing the link configuration
*
* Returns 0 on success or a negative error code on failure.
*/
int drm_dp_link_power_up(struct drm_dp_aux *aux, struct drm_dp_link *link)
{
u8 value;
int err;

/* DP_SET_POWER register is only available on DPCD v1.1 and later */
if (link->revision < 0x11)
return 0;

err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value);
if (err < 0)
return err;

value &= ~DP_SET_POWER_MASK;
value |= DP_SET_POWER_D0;

err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);
if (err < 0)
return err;

/*
* According to the DP 1.1 specification, a "Sink Device must exit the
* power saving state within 1 ms" (Section 2.5.3.1, Table 5-52, "Sink
* Control Field" (register 0x600).
*/
usleep_range(1000, 2000);

return 0;
}
EXPORT_SYMBOL(drm_dp_link_power_up);

/**
* drm_dp_link_power_down() - power down a DisplayPort link
* @aux: DisplayPort AUX channel
* @link: pointer to a structure containing the link configuration
*
* Returns 0 on success or a negative error code on failure.
*/
int drm_dp_link_power_down(struct drm_dp_aux *aux, struct drm_dp_link *link)
{
u8 value;
int err;

/* DP_SET_POWER register is only available on DPCD v1.1 and later */
if (link->revision < 0x11)
return 0;

err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value);
if (err < 0)
return err;

value &= ~DP_SET_POWER_MASK;
value |= DP_SET_POWER_D3;

err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);
if (err < 0)
return err;

return 0;
}
EXPORT_SYMBOL(drm_dp_link_power_down);

/**
* drm_dp_link_configure() - configure a DisplayPort link
* @aux: DisplayPort AUX channel
* @link: pointer to a structure containing the link configuration
*
* Returns 0 on success or a negative error code on failure.
*/
int drm_dp_link_configure(struct drm_dp_aux *aux, struct drm_dp_link *link)
{
u8 values[2];
int err;

values[0] = drm_dp_link_rate_to_bw_code(link->rate);
values[1] = link->num_lanes;

if (link->capabilities & DP_LINK_CAP_ENHANCED_FRAMING)
values[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN;

err = drm_dp_dpcd_write(aux, DP_LINK_BW_SET, values, sizeof(values));
if (err < 0)
return err;

return 0;
}
EXPORT_SYMBOL(drm_dp_link_configure);

/**
* drm_dp_downstream_max_clock() - extract branch device max
* pixel rate for legacy VGA
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1 change: 1 addition & 0 deletions drivers/gpu/drm/tegra/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -5,6 +5,7 @@ tegra-drm-y := \
drm.o \
gem.o \
fb.o \
dp.o \
hub.o \
plane.o \
dc.o \
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133 changes: 133 additions & 0 deletions drivers/gpu/drm/tegra/dp.c
Original file line number Diff line number Diff line change
@@ -0,0 +1,133 @@
// SPDX-License-Identifier: MIT
/*
* Copyright (C) 2013-2019 NVIDIA Corporation
* Copyright (C) 2015 Rob Clark
*/

#include <drm/drm_dp_helper.h>

#include "dp.h"

/**
* drm_dp_link_probe() - probe a DisplayPort link for capabilities
* @aux: DisplayPort AUX channel
* @link: pointer to structure in which to return link capabilities
*
* The structure filled in by this function can usually be passed directly
* into drm_dp_link_power_up() and drm_dp_link_configure() to power up and
* configure the link based on the link's capabilities.
*
* Returns 0 on success or a negative error code on failure.
*/
int drm_dp_link_probe(struct drm_dp_aux *aux, struct drm_dp_link *link)
{
u8 values[3];
int err;

memset(link, 0, sizeof(*link));

err = drm_dp_dpcd_read(aux, DP_DPCD_REV, values, sizeof(values));
if (err < 0)
return err;

link->revision = values[0];
link->rate = drm_dp_bw_code_to_link_rate(values[1]);
link->num_lanes = values[2] & DP_MAX_LANE_COUNT_MASK;

if (values[2] & DP_ENHANCED_FRAME_CAP)
link->capabilities |= DP_LINK_CAP_ENHANCED_FRAMING;

return 0;
}

/**
* drm_dp_link_power_up() - power up a DisplayPort link
* @aux: DisplayPort AUX channel
* @link: pointer to a structure containing the link configuration
*
* Returns 0 on success or a negative error code on failure.
*/
int drm_dp_link_power_up(struct drm_dp_aux *aux, struct drm_dp_link *link)
{
u8 value;
int err;

/* DP_SET_POWER register is only available on DPCD v1.1 and later */
if (link->revision < 0x11)
return 0;

err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value);
if (err < 0)
return err;

value &= ~DP_SET_POWER_MASK;
value |= DP_SET_POWER_D0;

err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);
if (err < 0)
return err;

/*
* According to the DP 1.1 specification, a "Sink Device must exit the
* power saving state within 1 ms" (Section 2.5.3.1, Table 5-52, "Sink
* Control Field" (register 0x600).
*/
usleep_range(1000, 2000);

return 0;
}

/**
* drm_dp_link_power_down() - power down a DisplayPort link
* @aux: DisplayPort AUX channel
* @link: pointer to a structure containing the link configuration
*
* Returns 0 on success or a negative error code on failure.
*/
int drm_dp_link_power_down(struct drm_dp_aux *aux, struct drm_dp_link *link)
{
u8 value;
int err;

/* DP_SET_POWER register is only available on DPCD v1.1 and later */
if (link->revision < 0x11)
return 0;

err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value);
if (err < 0)
return err;

value &= ~DP_SET_POWER_MASK;
value |= DP_SET_POWER_D3;

err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);
if (err < 0)
return err;

return 0;
}

/**
* drm_dp_link_configure() - configure a DisplayPort link
* @aux: DisplayPort AUX channel
* @link: pointer to a structure containing the link configuration
*
* Returns 0 on success or a negative error code on failure.
*/
int drm_dp_link_configure(struct drm_dp_aux *aux, struct drm_dp_link *link)
{
u8 values[2];
int err;

values[0] = drm_dp_link_rate_to_bw_code(link->rate);
values[1] = link->num_lanes;

if (link->capabilities & DP_LINK_CAP_ENHANCED_FRAMING)
values[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN;

err = drm_dp_dpcd_write(aux, DP_LINK_BW_SET, values, sizeof(values));
if (err < 0)
return err;

return 0;
}
26 changes: 26 additions & 0 deletions drivers/gpu/drm/tegra/dp.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,26 @@
/* SPDX-License-Identifier: MIT */
/*
* Copyright (C) 2013-2019 NVIDIA Corporation.
* Copyright (C) 2015 Rob Clark
*/

#ifndef DRM_TEGRA_DP_H
#define DRM_TEGRA_DP_H 1

struct drm_dp_aux;

#define DP_LINK_CAP_ENHANCED_FRAMING (1 << 0)

struct drm_dp_link {
unsigned char revision;
unsigned int rate;
unsigned int num_lanes;
unsigned long capabilities;
};

int drm_dp_link_probe(struct drm_dp_aux *aux, struct drm_dp_link *link);
int drm_dp_link_power_up(struct drm_dp_aux *aux, struct drm_dp_link *link);
int drm_dp_link_power_down(struct drm_dp_aux *aux, struct drm_dp_link *link);
int drm_dp_link_configure(struct drm_dp_aux *aux, struct drm_dp_link *link);

#endif
1 change: 1 addition & 0 deletions drivers/gpu/drm/tegra/dpaux.c
Original file line number Diff line number Diff line change
Expand Up @@ -22,6 +22,7 @@
#include <drm/drm_dp_helper.h>
#include <drm/drm_panel.h>

#include "dp.h"
#include "dpaux.h"
#include "drm.h"
#include "trace.h"
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1 change: 1 addition & 0 deletions drivers/gpu/drm/tegra/sor.c
Original file line number Diff line number Diff line change
Expand Up @@ -25,6 +25,7 @@
#include <drm/drm_scdc_helper.h>

#include "dc.h"
#include "dp.h"
#include "drm.h"
#include "hda.h"
#include "sor.h"
Expand Down
16 changes: 0 additions & 16 deletions include/drm/drm_dp_helper.h
Original file line number Diff line number Diff line change
Expand Up @@ -1455,22 +1455,6 @@ static inline ssize_t drm_dp_dpcd_writeb(struct drm_dp_aux *aux,
int drm_dp_dpcd_read_link_status(struct drm_dp_aux *aux,
u8 status[DP_LINK_STATUS_SIZE]);

/*
* DisplayPort link
*/
#define DP_LINK_CAP_ENHANCED_FRAMING (1 << 0)

struct drm_dp_link {
unsigned char revision;
unsigned int rate;
unsigned int num_lanes;
unsigned long capabilities;
};

int drm_dp_link_probe(struct drm_dp_aux *aux, struct drm_dp_link *link);
int drm_dp_link_power_up(struct drm_dp_aux *aux, struct drm_dp_link *link);
int drm_dp_link_power_down(struct drm_dp_aux *aux, struct drm_dp_link *link);
int drm_dp_link_configure(struct drm_dp_aux *aux, struct drm_dp_link *link);
int drm_dp_downstream_max_clock(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
const u8 port_cap[4]);
int drm_dp_downstream_max_bpc(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
Expand Down

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