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Commits on Dec 11, 2020

• Add and use a generic version of devmem_is_allowed()

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• arm64: Use the generic devmem_is_allowed()

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• arm: Use the generic devmem_is_allowed()

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• RISC-V: Use the new generic devmem_is_allowed()

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• lib: Add a generic version of devmem_is_allowed()

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• RISC-V: Define get_cycles64() regardless of M-mode

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Commits on Nov 6, 2020

• RISC-V: Fix the VDSO symbol generaton for binutils-2.35+

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Commits on Oct 20, 2020

• arm64: Fix a broken copyright header in gen_vdso_offsets.sh

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Commits on Oct 4, 2020

• Merge branch 'base.set_fs' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs into for-next

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Commits on Oct 2, 2020

• Merge tag 'efi-riscv-shared-for-v5.10' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/efi/efi into for-next

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Commits on Sep 30, 2020

• clocksource: clint: Export clint_time_val for modules

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Commits on Sep 19, 2020

• RISC-V: Resurrect the MMIO timer implementation for M-mode systems

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Commits on Sep 11, 2020

• RISC-V: Take text_mutex in ftrace_init_nop()

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Commits on Jul 23, 2020

• powerpc/64: Fix an out of date comment about MMIO ordering

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Commits on Jul 17, 2020

• RISC-V: Upgrade smp_mb__after_spinlock() to iorw,iorw

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Commits on Jun 21, 2020

• irqchip/riscv-intc: Fix a typo in a pr_warn()

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Commits on Jun 10, 2020

• RISC-V: Sort select statements alphanumerically

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Commits on May 28, 2020

• soc: sifive: l2 cache: Mark l2_get_priv_group as static

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• soc: sifive: l2 cache: Eliminate an unsigned zero compare warning

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Commits on May 21, 2020

• RISC-V: gp_in_global needs register keyword

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Commits on May 18, 2020

• RISC-V: Skip setting up PMPs on traps

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• riscv: K210: Add a built-in device tree

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• riscv: Allow device trees to be built into the kernel

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Commits on Apr 7, 2020

• mm: prevent a warning when casting void* -> enum

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Commits on Mar 12, 2020

• tty: sifive: Finish transmission before changing the clock

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Commits on Mar 3, 2020

• RISC-V: Stop using LOCAL for the uaccess fixups

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• RISC-V: Inline the assembly register save/restore macros

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• RISC-V: Stop relying on GCC's register allocator's hueristics

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• RISC-V: Stop putting .sbss in .sdata

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Commits on Nov 26, 2019

• PCI: Remove PCI_MSI_IRQ_DOMAIN architecture whitelist

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Commits on Oct 30, 2019

• MAINTAINERS: Change to my personal email address

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Commits on Oct 1, 2019

• RISC-V: Clear load reservations while restoring hart contexts

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Commits on Sep 14, 2019

• Documentation: Add "earlycon=sbi" to the admin guide

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Commits on Aug 8, 2019

• RISC-V: Remove udivdi3

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Commits on Jul 22, 2019

• MAINTAINERS: Add Paul as a RISC-V maintainer

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