this chip has some registers that are only 8 and 16 bit

biboc · Apr 9, 2016 · 35aa250 · 35aa250
1 parent 3e577d3
commit 35aa250
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Showing 13 changed files with 269 additions and 183 deletions.
diff --git a/ATSAMD21/blinker01/blinker01.gcc.thumb.flash.bin b/ATSAMD21/blinker01/blinker01.gcc.thumb.flash.bin
diff --git a/ATSAMD21/blinker01/blinker01.gcc.thumb.flash.elf b/ATSAMD21/blinker01/blinker01.gcc.thumb.flash.elf
diff --git a/ATSAMD21/blinker01/blinker01.gcc.thumb.flash.list b/ATSAMD21/blinker01/blinker01.gcc.thumb.flash.list
@@ -23,85 +23,97 @@ Disassembly of section .text:
   3c:	00000047 	andeq	r0, r0, r7, asr #32
 
 00000040 <reset>:
-  40:	f000 f80a 	bl	58 <notmain>
+  40:	f000 f810 	bl	64 <notmain>
   44:	e7ff      	b.n	46 <hang>
 
 00000046 <hang>:
   46:	e7fe      	b.n	46 <hang>
 
-00000048 <PUT16>:
-  48:	8001      	strh	r1, [r0, #0]
+00000048 <PUT8>:
+  48:	7001      	strb	r1, [r0, #0]
   4a:	4770      	bx	lr
 
-0000004c <PUT32>:
-  4c:	6001      	str	r1, [r0, #0]
+0000004c <PUT16>:
+  4c:	8001      	strh	r1, [r0, #0]
   4e:	4770      	bx	lr
 
-00000050 <GET32>:
-  50:	6800      	ldr	r0, [r0, #0]
+00000050 <PUT32>:
+  50:	6001      	str	r1, [r0, #0]
   52:	4770      	bx	lr
 
-00000054 <dummy>:
-  54:	4770      	bx	lr
-  56:	46c0      	nop			; (mov r8, r8)
+00000054 <GET8>:
+  54:	7800      	ldrb	r0, [r0, #0]
+  56:	4770      	bx	lr
 
-00000058 <notmain>:
-  58:	2180      	movs	r1, #128	; 0x80
-  5a:	b570      	push	{r4, r5, r6, lr}
-  5c:	0289      	lsls	r1, r1, #10
-  5e:	481c      	ldr	r0, [pc, #112]	; (d0 <notmain+0x78>)
-  60:	f7ff fff4 	bl	4c <PUT32>
+00000058 <GET16>:
+  58:	8800      	ldrh	r0, [r0, #0]
+  5a:	4770      	bx	lr
+
+0000005c <GET32>:
+  5c:	6800      	ldr	r0, [r0, #0]
+  5e:	4770      	bx	lr
+
+00000060 <dummy>:
+  60:	4770      	bx	lr
+  62:	46c0      	nop			; (mov r8, r8)
+
+00000064 <notmain>:
   64:	2180      	movs	r1, #128	; 0x80
-  66:	481a      	ldr	r0, [pc, #104]	; (d0 <notmain+0x78>)
-  68:	0509      	lsls	r1, r1, #20
-  6a:	f7ff ffef 	bl	4c <PUT32>
-  6e:	2108      	movs	r1, #8
-  70:	4818      	ldr	r0, [pc, #96]	; (d4 <notmain+0x7c>)
-  72:	f7ff ffeb 	bl	4c <PUT32>
-  76:	2180      	movs	r1, #128	; 0x80
-  78:	4817      	ldr	r0, [pc, #92]	; (d8 <notmain+0x80>)
-  7a:	0289      	lsls	r1, r1, #10
-  7c:	f7ff ffe6 	bl	4c <PUT32>
-  80:	2180      	movs	r1, #128	; 0x80
-  82:	4815      	ldr	r0, [pc, #84]	; (d8 <notmain+0x80>)
-  84:	0509      	lsls	r1, r1, #20
-  86:	f7ff ffe1 	bl	4c <PUT32>
-  8a:	2108      	movs	r1, #8
-  8c:	4813      	ldr	r0, [pc, #76]	; (dc <notmain+0x84>)
-  8e:	f7ff ffdd 	bl	4c <PUT32>
-  92:	2400      	movs	r4, #0
-  94:	4d12      	ldr	r5, [pc, #72]	; (e0 <notmain+0x88>)
-  96:	0020      	movs	r0, r4
-  98:	3401      	adds	r4, #1
-  9a:	f7ff ffdb 	bl	54 <dummy>
-  9e:	42ac      	cmp	r4, r5
-  a0:	d1f9      	bne.n	96 <notmain+0x3e>
-  a2:	2180      	movs	r1, #128	; 0x80
-  a4:	480f      	ldr	r0, [pc, #60]	; (e4 <notmain+0x8c>)
-  a6:	0289      	lsls	r1, r1, #10
-  a8:	f7ff ffd0 	bl	4c <PUT32>
-  ac:	2180      	movs	r1, #128	; 0x80
-  ae:	480d      	ldr	r0, [pc, #52]	; (e4 <notmain+0x8c>)
-  b0:	0509      	lsls	r1, r1, #20
-  b2:	f7ff ffcb 	bl	4c <PUT32>
-  b6:	2108      	movs	r1, #8
-  b8:	480b      	ldr	r0, [pc, #44]	; (e8 <notmain+0x90>)
-  ba:	f7ff ffc7 	bl	4c <PUT32>
-  be:	2400      	movs	r4, #0
-  c0:	4d07      	ldr	r5, [pc, #28]	; (e0 <notmain+0x88>)
-  c2:	0020      	movs	r0, r4
-  c4:	3401      	adds	r4, #1
-  c6:	f7ff ffc5 	bl	54 <dummy>
-  ca:	42ac      	cmp	r4, r5
-  cc:	d1f9      	bne.n	c2 <notmain+0x6a>
-  ce:	e7d2      	b.n	76 <notmain+0x1e>
-  d0:	41004408 	tstmi	r0, r8, lsl #8
-  d4:	41004488 	smlabbmi	r0, r8, r4, r4
-  d8:	41004418 	tstmi	r0, r8, lsl r4
-  dc:	41004498 			; <UNDEFINED> instruction: 0x41004498
-  e0:	00004e20 	andeq	r4, r0, r0, lsr #28
-  e4:	41004414 	tstmi	r0, r4, lsl r4
-  e8:	41004494 			; <UNDEFINED> instruction: 0x41004494
+  66:	b570      	push	{r4, r5, r6, lr}
+  68:	0289      	lsls	r1, r1, #10
+  6a:	481c      	ldr	r0, [pc, #112]	; (dc <notmain+0x78>)
+  6c:	f7ff fff0 	bl	50 <PUT32>
+  70:	2180      	movs	r1, #128	; 0x80
+  72:	481a      	ldr	r0, [pc, #104]	; (dc <notmain+0x78>)
+  74:	0509      	lsls	r1, r1, #20
+  76:	f7ff ffeb 	bl	50 <PUT32>
+  7a:	2108      	movs	r1, #8
+  7c:	4818      	ldr	r0, [pc, #96]	; (e0 <notmain+0x7c>)
+  7e:	f7ff ffe7 	bl	50 <PUT32>
+  82:	2180      	movs	r1, #128	; 0x80
+  84:	4817      	ldr	r0, [pc, #92]	; (e4 <notmain+0x80>)
+  86:	0289      	lsls	r1, r1, #10
+  88:	f7ff ffe2 	bl	50 <PUT32>
+  8c:	2180      	movs	r1, #128	; 0x80
+  8e:	4815      	ldr	r0, [pc, #84]	; (e4 <notmain+0x80>)
+  90:	0509      	lsls	r1, r1, #20
+  92:	f7ff ffdd 	bl	50 <PUT32>
+  96:	2108      	movs	r1, #8
+  98:	4813      	ldr	r0, [pc, #76]	; (e8 <notmain+0x84>)
+  9a:	f7ff ffd9 	bl	50 <PUT32>
+  9e:	2400      	movs	r4, #0
+  a0:	4d12      	ldr	r5, [pc, #72]	; (ec <notmain+0x88>)
+  a2:	0020      	movs	r0, r4
+  a4:	3401      	adds	r4, #1
+  a6:	f7ff ffdb 	bl	60 <dummy>
+  aa:	42ac      	cmp	r4, r5
+  ac:	d1f9      	bne.n	a2 <notmain+0x3e>
+  ae:	2180      	movs	r1, #128	; 0x80
+  b0:	480f      	ldr	r0, [pc, #60]	; (f0 <notmain+0x8c>)
+  b2:	0289      	lsls	r1, r1, #10
+  b4:	f7ff ffcc 	bl	50 <PUT32>
+  b8:	2180      	movs	r1, #128	; 0x80
+  ba:	480d      	ldr	r0, [pc, #52]	; (f0 <notmain+0x8c>)
+  bc:	0509      	lsls	r1, r1, #20
+  be:	f7ff ffc7 	bl	50 <PUT32>
+  c2:	2108      	movs	r1, #8
+  c4:	480b      	ldr	r0, [pc, #44]	; (f4 <notmain+0x90>)
+  c6:	f7ff ffc3 	bl	50 <PUT32>
+  ca:	2400      	movs	r4, #0
+  cc:	4d07      	ldr	r5, [pc, #28]	; (ec <notmain+0x88>)
+  ce:	0020      	movs	r0, r4
+  d0:	3401      	adds	r4, #1
+  d2:	f7ff ffc5 	bl	60 <dummy>
+  d6:	42ac      	cmp	r4, r5
+  d8:	d1f9      	bne.n	ce <notmain+0x6a>
+  da:	e7d2      	b.n	82 <notmain+0x1e>
+  dc:	41004408 	tstmi	r0, r8, lsl #8
+  e0:	41004488 	smlabbmi	r0, r8, r4, r4
+  e4:	41004418 	tstmi	r0, r8, lsl r4
+  e8:	41004498 			; <UNDEFINED> instruction: 0x41004498
+  ec:	00004e20 	andeq	r4, r0, r0, lsr #28
+  f0:	41004414 	tstmi	r0, r4, lsl r4
+  f4:	41004494 			; <UNDEFINED> instruction: 0x41004494
 
 Disassembly of section .ARM.attributes:
 
@@ -111,19 +123,19 @@ Disassembly of section .ARM.attributes:
    8:	01006962 	tsteq	r0, r2, ror #18
    c:	00000022 	andeq	r0, r0, r2, lsr #32
   10:	4d524105 	ldfmie	f4, [r2, #-20]	; 0xffffffec
-  14:	4b367620 	blmi	d9d89c <notmain+0xd9d844>
+  14:	4b367620 	blmi	d9d89c <notmain+0xd9d838>
   18:	07090600 	streq	r0, [r9, -r0, lsl #12]
   1c:	0901084d 	stmdbeq	r1, {r0, r2, r3, r6, fp}
   20:	14041201 	strne	r1, [r4], #-513	; 0xfffffdff
   24:	17011501 	strne	r1, [r1, -r1, lsl #10]
-  28:	1a011803 	bne	4603c <notmain+0x45fe4>
+  28:	1a011803 	bne	4603c <notmain+0x45fd8>
   2c:	Address 0x000000000000002c is out of bounds.
 
 
 Disassembly of section .comment:
 
 00000000 <.comment>:
-   0:	3a434347 	bcc	10d0d24 <notmain+0x10d0ccc>
+   0:	3a434347 	bcc	10d0d24 <notmain+0x10d0cc0>
    4:	4e472820 	cdpmi	8, 4, cr2, cr7, cr0, {1}
    8:	35202955 	strcc	r2, [r0, #-2389]!	; 0xfffff6ab
    c:	302e332e 	eorcc	r3, lr, lr, lsr #6

diff --git a/ATSAMD21/blinker01/blinker01.gcc.thumb.sram.bin b/ATSAMD21/blinker01/blinker01.gcc.thumb.sram.bin
diff --git a/ATSAMD21/blinker01/blinker01.gcc.thumb.sram.elf b/ATSAMD21/blinker01/blinker01.gcc.thumb.sram.elf
diff --git a/ATSAMD21/blinker01/blinker01.gcc.thumb.sram.hex b/ATSAMD21/blinker01/blinker01.gcc.thumb.sram.hex
@@ -1,15 +1,15 @@
 :020000042000DA
-:100000000248854600F00CF8FFE7FEE700100020EC
-:100010000180704701607047006870477047C046B4
-:10002000802170B589021C48FFF7F4FF80211A482F
-:100030000905FFF7EFFF08211848FFF7EBFF8021C4
-:1000400017488902FFF7E6FF802115480905FFF7E9
-:10005000E1FF08211348FFF7DDFF0024124D2000C7
-:100060000134FFF7DBFFAC42F9D180210F48890250
-:10007000FFF7D0FF80210D480905FFF7CBFF0821CE
-:100080000B48FFF7C7FF0024074D20000134FFF79E
-:10009000C5FFAC42F9D1D2E7084400418844004191
-:1000A0001844004198440041204E0000144400418F
-:0400B0009444004133
+:100000000248854600F012F8FFE7FEE700100020E6
+:100010000170704701807047016070470078704739
+:1000200000887047006870477047C046802170B5EF
+:1000300089021C48FFF7F0FF80211A480905FFF7E5
+:10004000EBFF08211848FFF7E7FF802117488902D6
+:10005000FFF7E2FF802115480905FFF7DDFF0821C2
+:100060001348FFF7D9FF0024124D20000134FFF799
+:10007000DBFFAC42F9D180210F488902FFF7CCFFAA
+:1000800080210D480905FFF7C7FF08210B48FFF73E
+:10009000C3FF0024074D20000134FFF7C5FFAC4229
+:1000A000F9D1D2E708440041884400411844004196
+:1000B00098440041204E0000144400419444004103
 :0400000520000000D7
 :00000001FF
diff --git a/ATSAMD21/blinker01/blinker01.gcc.thumb.sram.list b/ATSAMD21/blinker01/blinker01.gcc.thumb.sram.list
@@ -7,7 +7,7 @@ Disassembly of section .text:
 20000000 <_start>:
 20000000:	4802      	ldr	r0, [pc, #8]	; (2000000c <stacktop>)
 20000002:	4685      	mov	sp, r0
-20000004:	f000 f80c 	bl	20000020 <notmain>
+20000004:	f000 f812 	bl	2000002c <notmain>
 20000008:	e7ff      	b.n	2000000a <hang>
 
 2000000a <hang>:
@@ -16,79 +16,91 @@ Disassembly of section .text:
 2000000c <stacktop>:
 2000000c:	20001000 	andcs	r1, r0, r0
 
-20000010 <PUT16>:
-20000010:	8001      	strh	r1, [r0, #0]
+20000010 <PUT8>:
+20000010:	7001      	strb	r1, [r0, #0]
 20000012:	4770      	bx	lr
 
-20000014 <PUT32>:
-20000014:	6001      	str	r1, [r0, #0]
+20000014 <PUT16>:
+20000014:	8001      	strh	r1, [r0, #0]
 20000016:	4770      	bx	lr
 
-20000018 <GET32>:
-20000018:	6800      	ldr	r0, [r0, #0]
+20000018 <PUT32>:
+20000018:	6001      	str	r1, [r0, #0]
 2000001a:	4770      	bx	lr
 
-2000001c <dummy>:
-2000001c:	4770      	bx	lr
-2000001e:	46c0      	nop			; (mov r8, r8)
+2000001c <GET8>:
+2000001c:	7800      	ldrb	r0, [r0, #0]
+2000001e:	4770      	bx	lr
 
-20000020 <notmain>:
-20000020:	2180      	movs	r1, #128	; 0x80
-20000022:	b570      	push	{r4, r5, r6, lr}
-20000024:	0289      	lsls	r1, r1, #10
-20000026:	481c      	ldr	r0, [pc, #112]	; (20000098 <notmain+0x78>)
-20000028:	f7ff fff4 	bl	20000014 <PUT32>
+20000020 <GET16>:
+20000020:	8800      	ldrh	r0, [r0, #0]
+20000022:	4770      	bx	lr
+
+20000024 <GET32>:
+20000024:	6800      	ldr	r0, [r0, #0]
+20000026:	4770      	bx	lr
+
+20000028 <dummy>:
+20000028:	4770      	bx	lr
+2000002a:	46c0      	nop			; (mov r8, r8)
+
+2000002c <notmain>:
 2000002c:	2180      	movs	r1, #128	; 0x80
-2000002e:	481a      	ldr	r0, [pc, #104]	; (20000098 <notmain+0x78>)
-20000030:	0509      	lsls	r1, r1, #20
-20000032:	f7ff ffef 	bl	20000014 <PUT32>
-20000036:	2108      	movs	r1, #8
-20000038:	4818      	ldr	r0, [pc, #96]	; (2000009c <notmain+0x7c>)
-2000003a:	f7ff ffeb 	bl	20000014 <PUT32>
-2000003e:	2180      	movs	r1, #128	; 0x80
-20000040:	4817      	ldr	r0, [pc, #92]	; (200000a0 <notmain+0x80>)
-20000042:	0289      	lsls	r1, r1, #10
-20000044:	f7ff ffe6 	bl	20000014 <PUT32>
-20000048:	2180      	movs	r1, #128	; 0x80
-2000004a:	4815      	ldr	r0, [pc, #84]	; (200000a0 <notmain+0x80>)
-2000004c:	0509      	lsls	r1, r1, #20
-2000004e:	f7ff ffe1 	bl	20000014 <PUT32>
-20000052:	2108      	movs	r1, #8
-20000054:	4813      	ldr	r0, [pc, #76]	; (200000a4 <notmain+0x84>)
-20000056:	f7ff ffdd 	bl	20000014 <PUT32>
-2000005a:	2400      	movs	r4, #0
-2000005c:	4d12      	ldr	r5, [pc, #72]	; (200000a8 <notmain+0x88>)
-2000005e:	0020      	movs	r0, r4
-20000060:	3401      	adds	r4, #1
-20000062:	f7ff ffdb 	bl	2000001c <dummy>
-20000066:	42ac      	cmp	r4, r5
-20000068:	d1f9      	bne.n	2000005e <notmain+0x3e>
-2000006a:	2180      	movs	r1, #128	; 0x80
-2000006c:	480f      	ldr	r0, [pc, #60]	; (200000ac <notmain+0x8c>)
-2000006e:	0289      	lsls	r1, r1, #10
-20000070:	f7ff ffd0 	bl	20000014 <PUT32>
-20000074:	2180      	movs	r1, #128	; 0x80
-20000076:	480d      	ldr	r0, [pc, #52]	; (200000ac <notmain+0x8c>)
-20000078:	0509      	lsls	r1, r1, #20
-2000007a:	f7ff ffcb 	bl	20000014 <PUT32>
-2000007e:	2108      	movs	r1, #8
-20000080:	480b      	ldr	r0, [pc, #44]	; (200000b0 <notmain+0x90>)
-20000082:	f7ff ffc7 	bl	20000014 <PUT32>
-20000086:	2400      	movs	r4, #0
-20000088:	4d07      	ldr	r5, [pc, #28]	; (200000a8 <notmain+0x88>)
-2000008a:	0020      	movs	r0, r4
-2000008c:	3401      	adds	r4, #1
-2000008e:	f7ff ffc5 	bl	2000001c <dummy>
-20000092:	42ac      	cmp	r4, r5
-20000094:	d1f9      	bne.n	2000008a <notmain+0x6a>
-20000096:	e7d2      	b.n	2000003e <notmain+0x1e>
-20000098:	41004408 	tstmi	r0, r8, lsl #8
-2000009c:	41004488 	smlabbmi	r0, r8, r4, r4
-200000a0:	41004418 	tstmi	r0, r8, lsl r4
-200000a4:	41004498 			; <UNDEFINED> instruction: 0x41004498
-200000a8:	00004e20 	andeq	r4, r0, r0, lsr #28
-200000ac:	41004414 	tstmi	r0, r4, lsl r4
-200000b0:	41004494 			; <UNDEFINED> instruction: 0x41004494
+2000002e:	b570      	push	{r4, r5, r6, lr}
+20000030:	0289      	lsls	r1, r1, #10
+20000032:	481c      	ldr	r0, [pc, #112]	; (200000a4 <notmain+0x78>)
+20000034:	f7ff fff0 	bl	20000018 <PUT32>
+20000038:	2180      	movs	r1, #128	; 0x80
+2000003a:	481a      	ldr	r0, [pc, #104]	; (200000a4 <notmain+0x78>)
+2000003c:	0509      	lsls	r1, r1, #20
+2000003e:	f7ff ffeb 	bl	20000018 <PUT32>
+20000042:	2108      	movs	r1, #8
+20000044:	4818      	ldr	r0, [pc, #96]	; (200000a8 <notmain+0x7c>)
+20000046:	f7ff ffe7 	bl	20000018 <PUT32>
+2000004a:	2180      	movs	r1, #128	; 0x80
+2000004c:	4817      	ldr	r0, [pc, #92]	; (200000ac <notmain+0x80>)
+2000004e:	0289      	lsls	r1, r1, #10
+20000050:	f7ff ffe2 	bl	20000018 <PUT32>
+20000054:	2180      	movs	r1, #128	; 0x80
+20000056:	4815      	ldr	r0, [pc, #84]	; (200000ac <notmain+0x80>)
+20000058:	0509      	lsls	r1, r1, #20
+2000005a:	f7ff ffdd 	bl	20000018 <PUT32>
+2000005e:	2108      	movs	r1, #8
+20000060:	4813      	ldr	r0, [pc, #76]	; (200000b0 <notmain+0x84>)
+20000062:	f7ff ffd9 	bl	20000018 <PUT32>
+20000066:	2400      	movs	r4, #0
+20000068:	4d12      	ldr	r5, [pc, #72]	; (200000b4 <notmain+0x88>)
+2000006a:	0020      	movs	r0, r4
+2000006c:	3401      	adds	r4, #1
+2000006e:	f7ff ffdb 	bl	20000028 <dummy>
+20000072:	42ac      	cmp	r4, r5
+20000074:	d1f9      	bne.n	2000006a <notmain+0x3e>
+20000076:	2180      	movs	r1, #128	; 0x80
+20000078:	480f      	ldr	r0, [pc, #60]	; (200000b8 <notmain+0x8c>)
+2000007a:	0289      	lsls	r1, r1, #10
+2000007c:	f7ff ffcc 	bl	20000018 <PUT32>
+20000080:	2180      	movs	r1, #128	; 0x80
+20000082:	480d      	ldr	r0, [pc, #52]	; (200000b8 <notmain+0x8c>)
+20000084:	0509      	lsls	r1, r1, #20
+20000086:	f7ff ffc7 	bl	20000018 <PUT32>
+2000008a:	2108      	movs	r1, #8
+2000008c:	480b      	ldr	r0, [pc, #44]	; (200000bc <notmain+0x90>)
+2000008e:	f7ff ffc3 	bl	20000018 <PUT32>
+20000092:	2400      	movs	r4, #0
+20000094:	4d07      	ldr	r5, [pc, #28]	; (200000b4 <notmain+0x88>)
+20000096:	0020      	movs	r0, r4
+20000098:	3401      	adds	r4, #1
+2000009a:	f7ff ffc5 	bl	20000028 <dummy>
+2000009e:	42ac      	cmp	r4, r5
+200000a0:	d1f9      	bne.n	20000096 <notmain+0x6a>
+200000a2:	e7d2      	b.n	2000004a <notmain+0x1e>
+200000a4:	41004408 	tstmi	r0, r8, lsl #8
+200000a8:	41004488 	smlabbmi	r0, r8, r4, r4
+200000ac:	41004418 	tstmi	r0, r8, lsl r4
+200000b0:	41004498 			; <UNDEFINED> instruction: 0x41004498
+200000b4:	00004e20 	andeq	r4, r0, r0, lsr #28
+200000b8:	41004414 	tstmi	r0, r4, lsl r4
+200000bc:	41004494 			; <UNDEFINED> instruction: 0x41004494
 
 Disassembly of section .ARM.attributes:
 

diff --git a/ATSAMD21/blinker01/flash.o b/ATSAMD21/blinker01/flash.o