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ARC: [arcompact] Handle bus error from userspace as Interrupt not exc…
…eption Bus errors from userspace on ARCompact based cores are handled by core as a high priority L2 interrupt but current code treated it as interrupt Handling an interrupt like exception is certainly not going to go unnoticed. (and it worked so far as we never saw a Bus error from userspace until IPPK guys tested a DDR controller with ECC error detection etc hence needed to explicitly trigger/handle such errors) - So move mem_service exception handler from common code into ARCv2 code. - In ARCompact code, define mem_service as L2 interrupt handler which just drops down to pure kernel mode and goes of to enqueue SIGBUS Reported-by: Nelson Pereira <[email protected]> Tested-by: Ana Martins <[email protected]> Signed-off-by: Vineet Gupta <[email protected]>
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