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blackfin: fix L1 data A overflow link issue
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This patch fix below compile error:
"bfin-uclinux-ld: L1 data A overflow!"

It is due to the recent lib/gen_crc32table.c change:
46c5801
crc32: bolt on crc32c

it added 8KiB more data to __cacheline_aligned which cause blackfin L1 data
cache overflow.

Signed-off-by: Mike Frysinger <[email protected]>
Signed-off-by: Bob Liu <[email protected]>
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vapier authored and aet00 committed Apr 6, 2012
1 parent 5d32c88 commit 95fc2d8
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion arch/blackfin/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -823,7 +823,7 @@ config CACHELINE_ALIGNED_L1
bool "Locate cacheline_aligned data to L1 Data Memory"
default y if !BF54x
default n if BF54x
depends on !SMP && !BF531
depends on !SMP && !BF531 && !CRC32
help
If enabled, cacheline_aligned data is linked
into L1 data memory. (less latency)
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