ioport: register ranges by byte aligned addresses always

The I/O port space is byte addressable, even for word and long accesses. An example is the VMware svga card, which has long ports on offsets 0, 1, and 2. Reviewed-by: Anthony Liguori <[email protected]> Signed-off-by: Avi Kivity <[email protected]> Signed-off-by: Anthony Liguori <[email protected]>
boricj · Jul 29, 2011 · bf3fb0e · bf3fb0e
1 parent 62152b8
commit bf3fb0e
Showing 1 changed file with 2 additions and 2 deletions.
diff --git a/ioport.c b/ioport.c
@@ -146,7 +146,7 @@ int register_ioport_read(pio_addr_t start, int length, int size,
         hw_error("register_ioport_read: invalid size");
         return -1;
     }
-    for(i = start; i < start + length; i += size) {
+    for(i = start; i < start + length; ++i) {
         ioport_read_table[bsize][i] = func;
         if (ioport_opaque[i] != NULL && ioport_opaque[i] != opaque)
             hw_error("register_ioport_read: invalid opaque for address 0x%x",
@@ -166,7 +166,7 @@ int register_ioport_write(pio_addr_t start, int length, int size,
         hw_error("register_ioport_write: invalid size");
         return -1;
     }
-    for(i = start; i < start + length; i += size) {
+    for(i = start; i < start + length; ++i) {
         ioport_write_table[bsize][i] = func;
         if (ioport_opaque[i] != NULL && ioport_opaque[i] != opaque)
             hw_error("register_ioport_write: invalid opaque for address 0x%x",