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Merge branch 'regulator-5.0' into regulator-linus
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broonie committed Mar 4, 2019
2 parents 1c163f4 + c25d478 commit c364098
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Showing 18 changed files with 165 additions and 155 deletions.
18 changes: 9 additions & 9 deletions drivers/regulator/axp20x-regulator.c
Original file line number Diff line number Diff line change
Expand Up @@ -573,7 +573,7 @@ static const struct regulator_desc axp22x_regulators[] = {
AXP22X_DCDC3_V_OUT, AXP22X_DCDC3_V_OUT_MASK,
AXP22X_PWR_OUT_CTRL1, AXP22X_PWR_OUT_DCDC3_MASK),
AXP_DESC(AXP22X, DCDC4, "dcdc4", "vin4", 600, 1540, 20,
AXP22X_DCDC4_V_OUT, AXP22X_DCDC4_V_OUT,
AXP22X_DCDC4_V_OUT, AXP22X_DCDC4_V_OUT_MASK,
AXP22X_PWR_OUT_CTRL1, AXP22X_PWR_OUT_DCDC4_MASK),
AXP_DESC(AXP22X, DCDC5, "dcdc5", "vin5", 1000, 2550, 50,
AXP22X_DCDC5_V_OUT, AXP22X_DCDC5_V_OUT_MASK,
Expand Down Expand Up @@ -719,7 +719,7 @@ static const struct regulator_desc axp803_regulators[] = {
AXP22X_ALDO1_V_OUT, AXP22X_ALDO1_V_OUT_MASK,
AXP22X_PWR_OUT_CTRL3, AXP806_PWR_OUT_ALDO1_MASK),
AXP_DESC(AXP803, ALDO2, "aldo2", "aldoin", 700, 3300, 100,
AXP22X_ALDO2_V_OUT, AXP22X_ALDO2_V_OUT,
AXP22X_ALDO2_V_OUT, AXP22X_ALDO2_V_OUT_MASK,
AXP22X_PWR_OUT_CTRL3, AXP806_PWR_OUT_ALDO2_MASK),
AXP_DESC(AXP803, ALDO3, "aldo3", "aldoin", 700, 3300, 100,
AXP22X_ALDO3_V_OUT, AXP22X_ALDO3_V_OUT_MASK,
Expand All @@ -729,7 +729,7 @@ static const struct regulator_desc axp803_regulators[] = {
AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DLDO1_MASK),
AXP_DESC_RANGES(AXP803, DLDO2, "dldo2", "dldoin",
axp803_dldo2_ranges, AXP803_DLDO2_NUM_VOLTAGES,
AXP22X_DLDO2_V_OUT, AXP22X_DLDO2_V_OUT,
AXP22X_DLDO2_V_OUT, AXP22X_DLDO2_V_OUT_MASK,
AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DLDO2_MASK),
AXP_DESC(AXP803, DLDO3, "dldo3", "dldoin", 700, 3300, 100,
AXP22X_DLDO3_V_OUT, AXP22X_DLDO3_V_OUT_MASK,
Expand All @@ -744,7 +744,7 @@ static const struct regulator_desc axp803_regulators[] = {
AXP22X_ELDO2_V_OUT, AXP22X_ELDO2_V_OUT_MASK,
AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_ELDO2_MASK),
AXP_DESC(AXP803, ELDO3, "eldo3", "eldoin", 700, 1900, 50,
AXP22X_ELDO3_V_OUT, AXP22X_ELDO3_V_OUT,
AXP22X_ELDO3_V_OUT, AXP22X_ELDO3_V_OUT_MASK,
AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_ELDO3_MASK),
AXP_DESC(AXP803, FLDO1, "fldo1", "fldoin", 700, 1450, 50,
AXP803_FLDO1_V_OUT, AXP803_FLDO1_V_OUT_MASK,
Expand Down Expand Up @@ -791,7 +791,7 @@ static const struct regulator_desc axp806_regulators[] = {
AXP806_DCDCA_V_CTRL, AXP806_DCDCA_V_CTRL_MASK,
AXP806_PWR_OUT_CTRL1, AXP806_PWR_OUT_DCDCA_MASK),
AXP_DESC(AXP806, DCDCB, "dcdcb", "vinb", 1000, 2550, 50,
AXP806_DCDCB_V_CTRL, AXP806_DCDCB_V_CTRL,
AXP806_DCDCB_V_CTRL, AXP806_DCDCB_V_CTRL_MASK,
AXP806_PWR_OUT_CTRL1, AXP806_PWR_OUT_DCDCB_MASK),
AXP_DESC_RANGES(AXP806, DCDCC, "dcdcc", "vinc",
axp806_dcdca_ranges, AXP806_DCDCA_NUM_VOLTAGES,
Expand All @@ -817,7 +817,7 @@ static const struct regulator_desc axp806_regulators[] = {
AXP806_BLDO1_V_CTRL, AXP806_BLDO1_V_CTRL_MASK,
AXP806_PWR_OUT_CTRL2, AXP806_PWR_OUT_BLDO1_MASK),
AXP_DESC(AXP806, BLDO2, "bldo2", "bldoin", 700, 1900, 100,
AXP806_BLDO2_V_CTRL, AXP806_BLDO2_V_CTRL,
AXP806_BLDO2_V_CTRL, AXP806_BLDO2_V_CTRL_MASK,
AXP806_PWR_OUT_CTRL2, AXP806_PWR_OUT_BLDO2_MASK),
AXP_DESC(AXP806, BLDO3, "bldo3", "bldoin", 700, 1900, 100,
AXP806_BLDO3_V_CTRL, AXP806_BLDO3_V_CTRL_MASK,
Expand Down Expand Up @@ -952,7 +952,7 @@ static const struct regulator_desc axp813_regulators[] = {
AXP22X_ALDO1_V_OUT, AXP22X_ALDO1_V_OUT_MASK,
AXP22X_PWR_OUT_CTRL3, AXP806_PWR_OUT_ALDO1_MASK),
AXP_DESC(AXP813, ALDO2, "aldo2", "aldoin", 700, 3300, 100,
AXP22X_ALDO2_V_OUT, AXP22X_ALDO2_V_OUT,
AXP22X_ALDO2_V_OUT, AXP22X_ALDO2_V_OUT_MASK,
AXP22X_PWR_OUT_CTRL3, AXP806_PWR_OUT_ALDO2_MASK),
AXP_DESC(AXP813, ALDO3, "aldo3", "aldoin", 700, 3300, 100,
AXP22X_ALDO3_V_OUT, AXP22X_ALDO3_V_OUT_MASK,
Expand All @@ -962,7 +962,7 @@ static const struct regulator_desc axp813_regulators[] = {
AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DLDO1_MASK),
AXP_DESC_RANGES(AXP813, DLDO2, "dldo2", "dldoin",
axp803_dldo2_ranges, AXP803_DLDO2_NUM_VOLTAGES,
AXP22X_DLDO2_V_OUT, AXP22X_DLDO2_V_OUT,
AXP22X_DLDO2_V_OUT, AXP22X_DLDO2_V_OUT_MASK,
AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DLDO2_MASK),
AXP_DESC(AXP813, DLDO3, "dldo3", "dldoin", 700, 3300, 100,
AXP22X_DLDO3_V_OUT, AXP22X_DLDO3_V_OUT_MASK,
Expand All @@ -977,7 +977,7 @@ static const struct regulator_desc axp813_regulators[] = {
AXP22X_ELDO2_V_OUT, AXP22X_ELDO2_V_OUT_MASK,
AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_ELDO2_MASK),
AXP_DESC(AXP813, ELDO3, "eldo3", "eldoin", 700, 1900, 50,
AXP22X_ELDO3_V_OUT, AXP22X_ELDO3_V_OUT,
AXP22X_ELDO3_V_OUT, AXP22X_ELDO3_V_OUT_MASK,
AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_ELDO3_MASK),
/* to do / check ... */
AXP_DESC(AXP813, FLDO1, "fldo1", "fldoin", 700, 1450, 50,
Expand Down
4 changes: 4 additions & 0 deletions drivers/regulator/bcm590xx-regulator.c
Original file line number Diff line number Diff line change
Expand Up @@ -242,8 +242,12 @@ static int bcm590xx_get_enable_register(int id)
case BCM590XX_REG_SDSR2:
reg = BCM590XX_SDSR2PMCTRL1;
break;
case BCM590XX_REG_VSR:
reg = BCM590XX_VSRPMCTRL1;
break;
case BCM590XX_REG_VBUS:
reg = BCM590XX_OTG_CTRL;
break;
}


Expand Down
12 changes: 3 additions & 9 deletions drivers/regulator/core.c
Original file line number Diff line number Diff line change
Expand Up @@ -1349,7 +1349,9 @@ static int set_machine_constraints(struct regulator_dev *rdev,
* We'll only apply the initial system load if an
* initial mode wasn't specified.
*/
regulator_lock(rdev);
drms_uA_update(rdev);
regulator_unlock(rdev);
}

if ((rdev->constraints->ramp_delay || rdev->constraints->ramp_disable)
Expand Down Expand Up @@ -2058,15 +2060,7 @@ static void _regulator_put(struct regulator *regulator)
debugfs_remove_recursive(regulator->debugfs);

if (regulator->dev) {
int count = 0;
struct regulator *r;

list_for_each_entry(r, &rdev->consumer_list, list)
if (r->dev == regulator->dev)
count++;

if (count == 1)
device_link_remove(regulator->dev, &rdev->dev);
device_link_remove(regulator->dev, &rdev->dev);

/* remove any sysfs entries */
sysfs_remove_link(&rdev->dev.kobj, regulator->supply_name);
Expand Down
64 changes: 32 additions & 32 deletions drivers/regulator/da9052-regulator.c
Original file line number Diff line number Diff line change
Expand Up @@ -290,10 +290,10 @@ static const struct regulator_ops da9052_ldo_ops = {
.disable = regulator_disable_regmap,
};

#define DA9052_LDO(_id, step, min, max, sbits, ebits, abits) \
#define DA9052_LDO(_id, _name, step, min, max, sbits, ebits, abits) \
{\
.reg_desc = {\
.name = #_id,\
.name = #_name,\
.ops = &da9052_ldo_ops,\
.type = REGULATOR_VOLTAGE,\
.id = DA9052_ID_##_id,\
Expand All @@ -310,10 +310,10 @@ static const struct regulator_ops da9052_ldo_ops = {
.activate_bit = (abits),\
}

#define DA9052_DCDC(_id, step, min, max, sbits, ebits, abits) \
#define DA9052_DCDC(_id, _name, step, min, max, sbits, ebits, abits) \
{\
.reg_desc = {\
.name = #_id,\
.name = #_name,\
.ops = &da9052_dcdc_ops,\
.type = REGULATOR_VOLTAGE,\
.id = DA9052_ID_##_id,\
Expand All @@ -331,37 +331,37 @@ static const struct regulator_ops da9052_ldo_ops = {
}

static struct da9052_regulator_info da9052_regulator_info[] = {
DA9052_DCDC(BUCK1, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBCOREGO),
DA9052_DCDC(BUCK2, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBPROGO),
DA9052_DCDC(BUCK3, 25, 950, 2525, 6, 6, DA9052_SUPPLY_VBMEMGO),
DA9052_DCDC(BUCK4, 50, 1800, 3600, 5, 6, 0),
DA9052_LDO(LDO1, 50, 600, 1800, 5, 6, 0),
DA9052_LDO(LDO2, 25, 600, 1800, 6, 6, DA9052_SUPPLY_VLDO2GO),
DA9052_LDO(LDO3, 25, 1725, 3300, 6, 6, DA9052_SUPPLY_VLDO3GO),
DA9052_LDO(LDO4, 25, 1725, 3300, 6, 6, 0),
DA9052_LDO(LDO5, 50, 1200, 3600, 6, 6, 0),
DA9052_LDO(LDO6, 50, 1200, 3600, 6, 6, 0),
DA9052_LDO(LDO7, 50, 1200, 3600, 6, 6, 0),
DA9052_LDO(LDO8, 50, 1200, 3600, 6, 6, 0),
DA9052_LDO(LDO9, 50, 1250, 3650, 6, 6, 0),
DA9052_LDO(LDO10, 50, 1200, 3600, 6, 6, 0),
DA9052_DCDC(BUCK1, buck1, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBCOREGO),
DA9052_DCDC(BUCK2, buck2, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBPROGO),
DA9052_DCDC(BUCK3, buck3, 25, 950, 2525, 6, 6, DA9052_SUPPLY_VBMEMGO),
DA9052_DCDC(BUCK4, buck4, 50, 1800, 3600, 5, 6, 0),
DA9052_LDO(LDO1, ldo1, 50, 600, 1800, 5, 6, 0),
DA9052_LDO(LDO2, ldo2, 25, 600, 1800, 6, 6, DA9052_SUPPLY_VLDO2GO),
DA9052_LDO(LDO3, ldo3, 25, 1725, 3300, 6, 6, DA9052_SUPPLY_VLDO3GO),
DA9052_LDO(LDO4, ldo4, 25, 1725, 3300, 6, 6, 0),
DA9052_LDO(LDO5, ldo5, 50, 1200, 3600, 6, 6, 0),
DA9052_LDO(LDO6, ldo6, 50, 1200, 3600, 6, 6, 0),
DA9052_LDO(LDO7, ldo7, 50, 1200, 3600, 6, 6, 0),
DA9052_LDO(LDO8, ldo8, 50, 1200, 3600, 6, 6, 0),
DA9052_LDO(LDO9, ldo9, 50, 1250, 3650, 6, 6, 0),
DA9052_LDO(LDO10, ldo10, 50, 1200, 3600, 6, 6, 0),
};

static struct da9052_regulator_info da9053_regulator_info[] = {
DA9052_DCDC(BUCK1, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBCOREGO),
DA9052_DCDC(BUCK2, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBPROGO),
DA9052_DCDC(BUCK3, 25, 950, 2525, 6, 6, DA9052_SUPPLY_VBMEMGO),
DA9052_DCDC(BUCK4, 25, 950, 2525, 6, 6, 0),
DA9052_LDO(LDO1, 50, 600, 1800, 5, 6, 0),
DA9052_LDO(LDO2, 25, 600, 1800, 6, 6, DA9052_SUPPLY_VLDO2GO),
DA9052_LDO(LDO3, 25, 1725, 3300, 6, 6, DA9052_SUPPLY_VLDO3GO),
DA9052_LDO(LDO4, 25, 1725, 3300, 6, 6, 0),
DA9052_LDO(LDO5, 50, 1200, 3600, 6, 6, 0),
DA9052_LDO(LDO6, 50, 1200, 3600, 6, 6, 0),
DA9052_LDO(LDO7, 50, 1200, 3600, 6, 6, 0),
DA9052_LDO(LDO8, 50, 1200, 3600, 6, 6, 0),
DA9052_LDO(LDO9, 50, 1250, 3650, 6, 6, 0),
DA9052_LDO(LDO10, 50, 1200, 3600, 6, 6, 0),
DA9052_DCDC(BUCK1, buck1, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBCOREGO),
DA9052_DCDC(BUCK2, buck2, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBPROGO),
DA9052_DCDC(BUCK3, buck3, 25, 950, 2525, 6, 6, DA9052_SUPPLY_VBMEMGO),
DA9052_DCDC(BUCK4, buck4, 25, 950, 2525, 6, 6, 0),
DA9052_LDO(LDO1, ldo1, 50, 600, 1800, 5, 6, 0),
DA9052_LDO(LDO2, ldo2, 25, 600, 1800, 6, 6, DA9052_SUPPLY_VLDO2GO),
DA9052_LDO(LDO3, ldo3, 25, 1725, 3300, 6, 6, DA9052_SUPPLY_VLDO3GO),
DA9052_LDO(LDO4, ldo4, 25, 1725, 3300, 6, 6, 0),
DA9052_LDO(LDO5, ldo5, 50, 1200, 3600, 6, 6, 0),
DA9052_LDO(LDO6, ldo6, 50, 1200, 3600, 6, 6, 0),
DA9052_LDO(LDO7, ldo7, 50, 1200, 3600, 6, 6, 0),
DA9052_LDO(LDO8, ldo8, 50, 1200, 3600, 6, 6, 0),
DA9052_LDO(LDO9, ldo9, 50, 1250, 3650, 6, 6, 0),
DA9052_LDO(LDO10, ldo10, 50, 1200, 3600, 6, 6, 0),
};

static inline struct da9052_regulator_info *find_regulator_info(u8 chip_id,
Expand Down
4 changes: 2 additions & 2 deletions drivers/regulator/lochnagar-regulator.c
Original file line number Diff line number Diff line change
Expand Up @@ -194,7 +194,7 @@ static const struct regulator_desc lochnagar_regulators[] = {
.name = "VDDCORE",
.supply_name = "SYSVDD",
.type = REGULATOR_VOLTAGE,
.n_voltages = 57,
.n_voltages = 66,
.ops = &lochnagar_vddcore_ops,

.id = LOCHNAGAR_VDDCORE,
Expand Down Expand Up @@ -226,7 +226,7 @@ static const struct of_device_id lochnagar_of_match[] = {
},
{
.compatible = "cirrus,lochnagar2-mic2vdd",
.data = &lochnagar_regulators[LOCHNAGAR_MIC1VDD],
.data = &lochnagar_regulators[LOCHNAGAR_MIC2VDD],
},
{
.compatible = "cirrus,lochnagar2-vddcore",
Expand Down
10 changes: 9 additions & 1 deletion drivers/regulator/max77620-regulator.c
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
/*
* Maxim MAX77620 Regulator driver
*
* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
*
* Author: Mallikarjun Kasoju <[email protected]>
* Laxman Dewangan <[email protected]>
Expand Down Expand Up @@ -803,6 +803,14 @@ static int max77620_regulator_probe(struct platform_device *pdev)
rdesc = &rinfo[id].desc;
pmic->rinfo[id] = &max77620_regs_info[id];
pmic->enable_power_mode[id] = MAX77620_POWER_MODE_NORMAL;
pmic->reg_pdata[id].active_fps_src = -1;
pmic->reg_pdata[id].active_fps_pd_slot = -1;
pmic->reg_pdata[id].active_fps_pu_slot = -1;
pmic->reg_pdata[id].suspend_fps_src = -1;
pmic->reg_pdata[id].suspend_fps_pd_slot = -1;
pmic->reg_pdata[id].suspend_fps_pu_slot = -1;
pmic->reg_pdata[id].power_ok = -1;
pmic->reg_pdata[id].ramp_rate_setting = -1;

ret = max77620_read_slew_rate(pmic, id);
if (ret < 0)
Expand Down
78 changes: 39 additions & 39 deletions drivers/regulator/mc13783-regulator.c
Original file line number Diff line number Diff line change
Expand Up @@ -228,67 +228,67 @@ static const unsigned int mc13783_pwgtdrv_val[] = {

static struct regulator_ops mc13783_gpo_regulator_ops;

#define MC13783_DEFINE(prefix, name, reg, vsel_reg, voltages) \
MC13xxx_DEFINE(MC13783_REG_, name, reg, vsel_reg, voltages, \
#define MC13783_DEFINE(prefix, name, node, reg, vsel_reg, voltages) \
MC13xxx_DEFINE(MC13783_REG_, name, node, reg, vsel_reg, voltages, \
mc13xxx_regulator_ops)

#define MC13783_FIXED_DEFINE(prefix, name, reg, voltages) \
MC13xxx_FIXED_DEFINE(MC13783_REG_, name, reg, voltages, \
#define MC13783_FIXED_DEFINE(prefix, name, node, reg, voltages) \
MC13xxx_FIXED_DEFINE(MC13783_REG_, name, node, reg, voltages, \
mc13xxx_fixed_regulator_ops)

#define MC13783_GPO_DEFINE(prefix, name, reg, voltages) \
MC13xxx_GPO_DEFINE(MC13783_REG_, name, reg, voltages, \
#define MC13783_GPO_DEFINE(prefix, name, node, reg, voltages) \
MC13xxx_GPO_DEFINE(MC13783_REG_, name, node, reg, voltages, \
mc13783_gpo_regulator_ops)

#define MC13783_DEFINE_SW(_name, _reg, _vsel_reg, _voltages) \
MC13783_DEFINE(REG, _name, _reg, _vsel_reg, _voltages)
#define MC13783_DEFINE_REGU(_name, _reg, _vsel_reg, _voltages) \
MC13783_DEFINE(REG, _name, _reg, _vsel_reg, _voltages)
#define MC13783_DEFINE_SW(_name, _node, _reg, _vsel_reg, _voltages) \
MC13783_DEFINE(REG, _name, _node, _reg, _vsel_reg, _voltages)
#define MC13783_DEFINE_REGU(_name, _node, _reg, _vsel_reg, _voltages) \
MC13783_DEFINE(REG, _name, _node, _reg, _vsel_reg, _voltages)

static struct mc13xxx_regulator mc13783_regulators[] = {
MC13783_DEFINE_SW(SW1A, SWITCHERS0, SWITCHERS0, mc13783_sw1x_val),
MC13783_DEFINE_SW(SW1B, SWITCHERS1, SWITCHERS1, mc13783_sw1x_val),
MC13783_DEFINE_SW(SW2A, SWITCHERS2, SWITCHERS2, mc13783_sw2x_val),
MC13783_DEFINE_SW(SW2B, SWITCHERS3, SWITCHERS3, mc13783_sw2x_val),
MC13783_DEFINE_SW(SW3, SWITCHERS5, SWITCHERS5, mc13783_sw3_val),

MC13783_FIXED_DEFINE(REG, VAUDIO, REGULATORMODE0, mc13783_vaudio_val),
MC13783_FIXED_DEFINE(REG, VIOHI, REGULATORMODE0, mc13783_viohi_val),
MC13783_DEFINE_REGU(VIOLO, REGULATORMODE0, REGULATORSETTING0,
MC13783_DEFINE_SW(SW1A, sw1a, SWITCHERS0, SWITCHERS0, mc13783_sw1x_val),
MC13783_DEFINE_SW(SW1B, sw1b, SWITCHERS1, SWITCHERS1, mc13783_sw1x_val),
MC13783_DEFINE_SW(SW2A, sw2a, SWITCHERS2, SWITCHERS2, mc13783_sw2x_val),
MC13783_DEFINE_SW(SW2B, sw2b, SWITCHERS3, SWITCHERS3, mc13783_sw2x_val),
MC13783_DEFINE_SW(SW3, sw3, SWITCHERS5, SWITCHERS5, mc13783_sw3_val),

MC13783_FIXED_DEFINE(REG, VAUDIO, vaudio, REGULATORMODE0, mc13783_vaudio_val),
MC13783_FIXED_DEFINE(REG, VIOHI, viohi, REGULATORMODE0, mc13783_viohi_val),
MC13783_DEFINE_REGU(VIOLO, violo, REGULATORMODE0, REGULATORSETTING0,
mc13783_violo_val),
MC13783_DEFINE_REGU(VDIG, REGULATORMODE0, REGULATORSETTING0,
MC13783_DEFINE_REGU(VDIG, vdig, REGULATORMODE0, REGULATORSETTING0,
mc13783_vdig_val),
MC13783_DEFINE_REGU(VGEN, REGULATORMODE0, REGULATORSETTING0,
MC13783_DEFINE_REGU(VGEN, vgen, REGULATORMODE0, REGULATORSETTING0,
mc13783_vgen_val),
MC13783_DEFINE_REGU(VRFDIG, REGULATORMODE0, REGULATORSETTING0,
MC13783_DEFINE_REGU(VRFDIG, vrfdig, REGULATORMODE0, REGULATORSETTING0,
mc13783_vrfdig_val),
MC13783_DEFINE_REGU(VRFREF, REGULATORMODE0, REGULATORSETTING0,
MC13783_DEFINE_REGU(VRFREF, vrfref, REGULATORMODE0, REGULATORSETTING0,
mc13783_vrfref_val),
MC13783_DEFINE_REGU(VRFCP, REGULATORMODE0, REGULATORSETTING0,
MC13783_DEFINE_REGU(VRFCP, vrfcp, REGULATORMODE0, REGULATORSETTING0,
mc13783_vrfcp_val),
MC13783_DEFINE_REGU(VSIM, REGULATORMODE1, REGULATORSETTING0,
MC13783_DEFINE_REGU(VSIM, vsim, REGULATORMODE1, REGULATORSETTING0,
mc13783_vsim_val),
MC13783_DEFINE_REGU(VESIM, REGULATORMODE1, REGULATORSETTING0,
MC13783_DEFINE_REGU(VESIM, vesim, REGULATORMODE1, REGULATORSETTING0,
mc13783_vesim_val),
MC13783_DEFINE_REGU(VCAM, REGULATORMODE1, REGULATORSETTING0,
MC13783_DEFINE_REGU(VCAM, vcam, REGULATORMODE1, REGULATORSETTING0,
mc13783_vcam_val),
MC13783_FIXED_DEFINE(REG, VRFBG, REGULATORMODE1, mc13783_vrfbg_val),
MC13783_DEFINE_REGU(VVIB, REGULATORMODE1, REGULATORSETTING1,
MC13783_FIXED_DEFINE(REG, VRFBG, vrfbg, REGULATORMODE1, mc13783_vrfbg_val),
MC13783_DEFINE_REGU(VVIB, vvib, REGULATORMODE1, REGULATORSETTING1,
mc13783_vvib_val),
MC13783_DEFINE_REGU(VRF1, REGULATORMODE1, REGULATORSETTING1,
MC13783_DEFINE_REGU(VRF1, vrf1, REGULATORMODE1, REGULATORSETTING1,
mc13783_vrf_val),
MC13783_DEFINE_REGU(VRF2, REGULATORMODE1, REGULATORSETTING1,
MC13783_DEFINE_REGU(VRF2, vrf2, REGULATORMODE1, REGULATORSETTING1,
mc13783_vrf_val),
MC13783_DEFINE_REGU(VMMC1, REGULATORMODE1, REGULATORSETTING1,
MC13783_DEFINE_REGU(VMMC1, vmmc1, REGULATORMODE1, REGULATORSETTING1,
mc13783_vmmc_val),
MC13783_DEFINE_REGU(VMMC2, REGULATORMODE1, REGULATORSETTING1,
MC13783_DEFINE_REGU(VMMC2, vmmc2, REGULATORMODE1, REGULATORSETTING1,
mc13783_vmmc_val),
MC13783_GPO_DEFINE(REG, GPO1, POWERMISC, mc13783_gpo_val),
MC13783_GPO_DEFINE(REG, GPO2, POWERMISC, mc13783_gpo_val),
MC13783_GPO_DEFINE(REG, GPO3, POWERMISC, mc13783_gpo_val),
MC13783_GPO_DEFINE(REG, GPO4, POWERMISC, mc13783_gpo_val),
MC13783_GPO_DEFINE(REG, PWGT1SPI, POWERMISC, mc13783_pwgtdrv_val),
MC13783_GPO_DEFINE(REG, PWGT2SPI, POWERMISC, mc13783_pwgtdrv_val),
MC13783_GPO_DEFINE(REG, GPO1, gpo1, POWERMISC, mc13783_gpo_val),
MC13783_GPO_DEFINE(REG, GPO2, gpo1, POWERMISC, mc13783_gpo_val),
MC13783_GPO_DEFINE(REG, GPO3, gpo1, POWERMISC, mc13783_gpo_val),
MC13783_GPO_DEFINE(REG, GPO4, gpo1, POWERMISC, mc13783_gpo_val),
MC13783_GPO_DEFINE(REG, PWGT1SPI, pwgt1spi, POWERMISC, mc13783_pwgtdrv_val),
MC13783_GPO_DEFINE(REG, PWGT2SPI, pwgt2spi, POWERMISC, mc13783_pwgtdrv_val),
};

static int mc13783_powermisc_rmw(struct mc13xxx_regulator_priv *priv, u32 mask,
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