MdeModulePkg PciBusDxe and DuetPkg PciBusNoEnumerationDxe: Update Res…

…etPowerManagementFeature() to clear 4 related R/W bits in the PMCSR register, leaving other bits preserved. Signed-off-by: Sun Rui <[email protected]> Reviewed-by: Fan Jeff <[email protected]> Reviewed-by: Michael Kinney <[email protected]> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13189 6f19259b-4bc3-4df7-8a09-765794883524
bumfany · Apr 12, 2012 · 7e24278 · 7e24278
1 parent afa9cd2
commit 7e24278
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Showing 2 changed files with 64 additions and 25 deletions.
diff --git a/DuetPkg/PciBusNoEnumerationDxe/PciPowerManagement.c b/DuetPkg/PciBusNoEnumerationDxe/PciPowerManagement.c
@@ -1,6 +1,6 @@
 /*++
 
-Copyright (c) 2005 - 2006, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2005 - 2012, Intel Corporation. All rights reserved.<BR>
 This program and the accompanying materials                          
 are licensed and made available under the terms and conditions of the BSD License         
 which accompanies this distribution.  The full text of the license may be found at        
@@ -46,7 +46,7 @@ Routine Description:
 {
   EFI_STATUS  Status;
   UINT8       PowerManagementRegBlock;
-  UINT16      PMCSR;
+  UINT16      PowerManagementCSR;
 
   PowerManagementRegBlock = 0;
 
@@ -64,18 +64,37 @@ Routine Description:
   //
   // Turn off the PWE assertion and put the device into D0 State
   //
-  PMCSR = 0x8000;
 
   //
-  // Write PMCSR
+  // Read PMCSR
   //
-  PciIoDevice->PciIo.Pci.Write (
-                          &PciIoDevice->PciIo,
-                          EfiPciIoWidthUint16,
-                          PowerManagementRegBlock + 4,
-                          1,
-                          &PMCSR
-                          );
-
-  return EFI_SUCCESS;
+  Status = PciIoDevice->PciIo.Pci.Read (
+                                    &PciIoDevice->PciIo,
+                                    EfiPciIoWidthUint16,
+                                    PowerManagementRegBlock + 4,
+                                    1,
+                                    &PowerManagementCSR
+                                    );
+  if (!EFI_ERROR (Status)) {
+    //
+    // Clear PME_Status bit
+    //
+    PowerManagementCSR |= BIT15;
+    //
+    // Clear PME_En bit. PowerState = D0.
+    //
+    PowerManagementCSR &= ~(BIT8 | BIT1 | BIT0);
+
+    //
+    // Write PMCSR
+    //
+    Status = PciIoDevice->PciIo.Pci.Write (
+                                      &PciIoDevice->PciIo,
+                                      EfiPciIoWidthUint16,
+                                      PowerManagementRegBlock + 4,
+                                      1,
+                                      &PowerManagementCSR
+                                      );
+  }
+  return Status;
 }
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.c
@@ -1,7 +1,7 @@
 /** @file
   Power management support fucntions implementation for PCI Bus module.
 
-Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
 This program and the accompanying materials
 are licensed and made available under the terms and conditions of the BSD License
 which accompanies this distribution.  The full text of the license may be found at
@@ -50,19 +50,39 @@ ResetPowerManagementFeature (
   //
   // Turn off the PWE assertion and put the device into D0 State
   //
-  PowerManagementCSR = 0x8000;
 
   //
-  // Write PMCSR
+  // Read PMCSR
   //
-  PciIoDevice->PciIo.Pci.Write (
-                           &PciIoDevice->PciIo,
-                           EfiPciIoWidthUint16,
-                           PowerManagementRegBlock + 4,
-                           1,
-                           &PowerManagementCSR
-                           );
-
-  return EFI_SUCCESS;
+  Status = PciIoDevice->PciIo.Pci.Read (
+                                    &PciIoDevice->PciIo,
+                                    EfiPciIoWidthUint16,
+                                    PowerManagementRegBlock + 4,
+                                    1,
+                                    &PowerManagementCSR
+                                    );
+
+  if (!EFI_ERROR (Status)) {
+    //
+    // Clear PME_Status bit
+    //
+    PowerManagementCSR |= BIT15;
+    //
+    // Clear PME_En bit. PowerState = D0.
+    //
+    PowerManagementCSR &= ~(BIT8 | BIT1 | BIT0);
+
+    //
+    // Write PMCSR
+    //
+    Status = PciIoDevice->PciIo.Pci.Write (
+                                      &PciIoDevice->PciIo,
+                                      EfiPciIoWidthUint16,
+                                      PowerManagementRegBlock + 4,
+                                      1,
+                                      &PowerManagementCSR
+                                      );
+  }
+  return Status;
 }