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config: zynq-common: Fix refclk setting
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Reorder the operations done for refclk setting. Check first that the
setting is valid and then apply the changes.

Signed-off-by: Mircea Caprioru <[email protected]>
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Mircea Caprioru committed Mar 18, 2021
1 parent 23a5c00 commit 8b44bd8
Showing 1 changed file with 5 additions and 5 deletions.
10 changes: 5 additions & 5 deletions include/configs/zynq-common.h
Original file line number Diff line number Diff line change
Expand Up @@ -273,9 +273,13 @@
"adi_loadvals_pluto=if test -n \"${ad936x_ext_refclk}\" && test ! -n \"${ad936x_skip_ext_refclk}\"; then " \
"fdt set /clocks/clock@0 clock-frequency ${ad936x_ext_refclk}; " \
"fi; " \
"if test -n \"${ad936x_ext_refclk_override}\" && test \"${model}\" = \"Analog Devices PlutoSDR Rev.C (Z7010/AD9363)\"; then " \
"if test -n \"${ad936x_ext_refclk_override}\"; then " \
"fdt set /clocks/clock@0 clock-frequency ${ad936x_ext_refclk_override}; " \
"fi; " \
"if test -n \"${refclk_source}\" && test ! \"${refclk_source}\" = \"internal\" && test ! \"${refclk_source}\" = \"external\"; then " \
"setenv refclk_source internal; " \
"saveenv; " \
"fi; " \
"if test \"${refclk_source}\" = \"internal\" && test \"${model}\" = \"Analog Devices PlutoSDR Rev.C (Z7010/AD9363)\" ; then " \
"fdt rm /amba/gpio@e000a000/clock_extern_en; " \
"fi; " \
Expand All @@ -293,10 +297,6 @@
"setenv mode 1r1t; " \
"saveenv; " \
"fi; " \
"if test -n \"${refclk_source}\" && test ! \"${refclk_source}\" = \"internal\" && test ! \"${refclk_source}\" = \"external\"; then " \
"setenv refclk_source internal; " \
"saveenv; " \
"fi; " \
"if test -n \"${compatible}\"; then " \
"fdt set /amba/spi@e0006000/ad9361-phy@0 compatible ${compatible}; " \
"fi; " \
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