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i2c: vt8500: Add support for I2C bus on Wondermedia SoCs
This patch adds support for the I2C bus controllers found on Wondermedia 8xxx-series SoCs. Only master-mode is supported. Signed-off-by: Tony Prisk <[email protected]> [wsa: fixed one macro to shift 8 instead of 16] Signed-off-by: Wolfram Sang <[email protected]>
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* Wondermedia I2C Controller | ||
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Required properties : | ||
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- compatible : should be "wm,wm8505-i2c" | ||
- reg : Offset and length of the register set for the device | ||
- interrupts : <IRQ> where IRQ is the interrupt number | ||
- clocks : phandle to the I2C clock source | ||
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Optional properties : | ||
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- clock-frequency : desired I2C bus clock frequency in Hz. | ||
Valid values are 100000 and 400000. | ||
Default to 100000 if not specified, or invalid value. | ||
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Example : | ||
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i2c_0: i2c@d8280000 { | ||
compatible = "wm,wm8505-i2c"; | ||
reg = <0xd8280000 0x1000>; | ||
interrupts = <19>; | ||
clocks = <&clki2c0>; | ||
clock-frequency = <400000>; | ||
}; |
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