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Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/lin…
…ux/kernel/git/tip/tip Pull irq code updates from Thomas Gleixner: "The irq department proudly presents: - Another tree wide sweep of irq infrastructure abuse. Clear winner of the trainwreck engineering contest was: #include "../../../kernel/irq/settings.h" - Tree wide update of irq_set_affinity() callbacks which miss a cpu online check when picking a single cpu out of the affinity mask. - Tree wide consolidation of interrupt statistics. - Updates to the threaded interrupt infrastructure to allow explicit wakeup of the interrupt thread and a variant of synchronize_irq() which synchronizes only the hard interrupt handler. Both are needed to replace the homebrewn thread handling in the mmc/sdhci code. - New irq chip callbacks to allow proper support for GPIO based irqs. The GPIO based interrupts need to request/release GPIO resources from request/free_irq. - A few new ARM interrupt chips. No revolutionary new hardware, just differently wreckaged variations of the scheme. - Small improvments, cleanups and updates all over the place" I was hoping that that trainwreck engineering contest was a April Fools' joke. But no. * 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (68 commits) irqchip: sun7i/sun6i: Disable NMI before registering the handler ARM: sun7i/sun6i: dts: Fix IRQ number for sun6i NMI controller ARM: sun7i/sun6i: irqchip: Update the documentation ARM: sun7i/sun6i: dts: Add NMI irqchip support ARM: sun7i/sun6i: irqchip: Add irqchip driver for NMI controller genirq: Export symbol no_action() arm: omap: Fix typo in ams-delta-fiq.c m68k: atari: Fix the last kernel_stat.h fallout irqchip: sun4i: Simplify sun4i_irq_ack irqchip: sun4i: Use handle_fasteoi_irq for all interrupts genirq: procfs: Make smp_affinity values go+r softirq: Add linux/irq.h to make it compile again m68k: amiga: Add linux/irq.h to make it compile again irqchip: sun4i: Don't ack IRQs > 0, fix acking of IRQ 0 irqchip: sun4i: Fix a comment about mask register initialization irqchip: sun4i: Fix irq 0 not working genirq: Add a new IRQCHIP_EOI_THREADED flag genirq: Document IRQCHIP_ONESHOT_SAFE flag ARM: sunxi: dt: Convert to the new irq controller compatibles irqchip: sunxi: Change compatibles ...
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Documentation/devicetree/bindings/interrupt-controller/allwinner,sun67i-sc-nmi.txt
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Original file line number | Diff line number | Diff line change |
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Allwinner Sunxi NMI Controller | ||
============================== | ||
|
||
Required properties: | ||
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||
- compatible : should be "allwinner,sun7i-a20-sc-nmi" or | ||
"allwinner,sun6i-a31-sc-nmi" | ||
- reg : Specifies base physical address and size of the registers. | ||
- interrupt-controller : Identifies the node as an interrupt controller | ||
- #interrupt-cells : Specifies the number of cells needed to encode an | ||
interrupt source. The value shall be 2. The first cell is the IRQ number, the | ||
second cell the trigger type as defined in interrupt.txt in this directory. | ||
- interrupt-parent: Specifies the parent interrupt controller. | ||
- interrupts: Specifies the interrupt line (NMI) which is handled by | ||
the interrupt controller in the parent controller's notation. This value | ||
shall be the NMI. | ||
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||
Example: | ||
|
||
sc-nmi-intc@01c00030 { | ||
compatible = "allwinner,sun7i-a20-sc-nmi"; | ||
interrupt-controller; | ||
#interrupt-cells = <2>; | ||
reg = <0x01c00030 0x0c>; | ||
interrupt-parent = <&gic>; | ||
interrupts = <0 0 4>; | ||
}; |
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