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ASoC: fsl_spdif: Fix wrong OFFSET of STC_SYSCLK_DIV
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It should use STC_SYSCLK_DIV_OFFSET. Thus fix it.

Signed-off-by: Nicolin Chen <[email protected]>
Signed-off-by: Mark Brown <[email protected]>
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Nicolin Chen authored and broonie committed Apr 18, 2014
1 parent c9eaa44 commit 6ae6698
Showing 1 changed file with 2 additions and 2 deletions.
4 changes: 2 additions & 2 deletions sound/soc/fsl/fsl_spdif.h
Original file line number Diff line number Diff line change
@@ -144,8 +144,8 @@ enum spdif_gainsel {

/* SPDIF Clock register */
#define STC_SYSCLK_DIV_OFFSET 11
#define STC_SYSCLK_DIV_MASK (0x1ff << STC_TXCLK_SRC_OFFSET)
#define STC_SYSCLK_DIV(x) ((((x) - 1) << STC_TXCLK_DIV_OFFSET) & STC_SYSCLK_DIV_MASK)
#define STC_SYSCLK_DIV_MASK (0x1ff << STC_SYSCLK_DIV_OFFSET)
#define STC_SYSCLK_DIV(x) ((((x) - 1) << STC_SYSCLK_DIV_OFFSET) & STC_SYSCLK_DIV_MASK)
#define STC_TXCLK_SRC_OFFSET 8
#define STC_TXCLK_SRC_MASK (0x7 << STC_TXCLK_SRC_OFFSET)
#define STC_TXCLK_SRC_SET(x) ((x << STC_TXCLK_SRC_OFFSET) & STC_TXCLK_SRC_MASK)

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