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sparcspkr: use sbus_*() primitives for IO
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The memory are mapped using of_ioremap() which is
an indication this is sbus memory.
Shift all uses of inb/outb to the sbus variants.

The inb/outb methods uses ASI_PHYS_BYPASS_EC_E_L,
whereas sbus_ variants uses ASI_PHYS_BYPASS_EC_E.

The difference is if the reads/writes are done in
native or little endian.
But for byte reads/writes there is no difference
so this does not matter for inb/outb - and this
driver only uses the byte variants.

Signed-off-by: Sam Ravnborg <[email protected]>
Signed-off-by: David S. Miller <[email protected]>
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sravnborg authored and davem330 committed Jul 22, 2014
1 parent 07d6692 commit d650471
Showing 1 changed file with 11 additions and 11 deletions.
22 changes: 11 additions & 11 deletions drivers/input/misc/sparcspkr.c
Original file line number Diff line number Diff line change
Expand Up @@ -86,13 +86,13 @@ static int bbc_spkr_event(struct input_dev *dev, unsigned int type, unsigned int
spin_lock_irqsave(&state->lock, flags);

if (count) {
outb(0x01, info->regs + 0);
outb(0x00, info->regs + 2);
outb((count >> 16) & 0xff, info->regs + 3);
outb((count >> 8) & 0xff, info->regs + 4);
outb(0x00, info->regs + 5);
sbus_writeb(0x01, info->regs + 0);
sbus_writeb(0x00, info->regs + 2);
sbus_writeb((count >> 16) & 0xff, info->regs + 3);
sbus_writeb((count >> 8) & 0xff, info->regs + 4);
sbus_writeb(0x00, info->regs + 5);
} else {
outb(0x00, info->regs + 0);
sbus_writeb(0x00, info->regs + 0);
}

spin_unlock_irqrestore(&state->lock, flags);
Expand Down Expand Up @@ -123,15 +123,15 @@ static int grover_spkr_event(struct input_dev *dev, unsigned int type, unsigned

if (count) {
/* enable counter 2 */
outb(inb(info->enable_reg) | 3, info->enable_reg);
sbus_writeb(sbus_readb(info->enable_reg) | 3, info->enable_reg);
/* set command for counter 2, 2 byte write */
outb(0xB6, info->freq_regs + 1);
sbus_writeb(0xB6, info->freq_regs + 1);
/* select desired HZ */
outb(count & 0xff, info->freq_regs + 0);
outb((count >> 8) & 0xff, info->freq_regs + 0);
sbus_writeb(count & 0xff, info->freq_regs + 0);
sbus_writeb((count >> 8) & 0xff, info->freq_regs + 0);
} else {
/* disable counter 2 */
outb(inb_p(info->enable_reg) & 0xFC, info->enable_reg);
sbus_writeb(sbus_readb(info->enable_reg) & 0xFC, info->enable_reg);
}

spin_unlock_irqrestore(&state->lock, flags);
Expand Down

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