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@cepdnaclk

Department of Computer Engineering, University of Peradeniya

Department of Computer Engineering, University of Peradeniya

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  1. projects.ce.pdn.ac.lk projects.ce.pdn.ac.lk Public

    This is the student project portfolio website of the Department of Computer Engineering, University of Peradeniya. https://projects.ce.pdn.ac.lk

    HTML 4 19

  2. faq.ce.pdn.ac.lk faq.ce.pdn.ac.lk Public

    FAQ website of the Department of Computer Engineering, University of Peradeniya https://faq.ce.pdn.ac.lk

    HTML 1 12

  3. people.ce.pdn.ac.lk people.ce.pdn.ac.lk Public

    Student and staff profile website of the Department of Computer Engineering, University of Peradeniya https://people.ce.pdn.ac.lk/

    HTML 7 176

  4. www.ce.pdn.ac.lk www.ce.pdn.ac.lk Public

    Department website

    HTML 11

  5. auto-generate-interim-transcripts-eng.pdn.ac.lk auto-generate-interim-transcripts-eng.pdn.ac.lk Public

    Forked from sathiiii/pera-transcript

    A tool to generate the unofficial transcript automatically for undergraduate students at University of Peradeniya.

    Python 1 1

  6. portal.ce.pdn.ac.lk portal.ce.pdn.ac.lk Public

    Internal and Public web service provider of the Department of Computer Engineering

    PHP 3 1

Repositories

Showing 10 of 607 repositories
  • api.ce.pdn.ac.lk Public

    API Portal of the Department of Computer Engineering https://api.ce.pdn.ac.lk/

    cepdnaclk/api.ce.pdn.ac.lk’s past year of commit activity
    Python 1 MIT 5 8 (3 issues need help) 0 Updated Jan 19, 2025
  • cepdnaclk.github.io Public

    Github pages website for Department of Computer Engineering, University of Peradeniya. https://cepdnaclk.github.io

    cepdnaclk/cepdnaclk.github.io’s past year of commit activity
    HTML 9 28 1 3 Updated Jan 19, 2025
  • projects.ce.pdn.ac.lk Public

    This is the student project portfolio website of the Department of Computer Engineering, University of Peradeniya. https://projects.ce.pdn.ac.lk

    cepdnaclk/projects.ce.pdn.ac.lk’s past year of commit activity
    HTML 4 MIT 19 4 (2 issues need help) 0 Updated Jan 19, 2025
  • e19-4yp-Quality-Assessment-of-Final-Root-Canal-Treatment-Using-Intra-Oral-Periapical-Radiographs Public

    This study addresses dental practice's challenge of evaluating root canal treatment quality. Current evaluation depends on subjective dentist judgment, lacking standardized criteria. here we developing an AI-based method using deep learning to automate and standardize the evaluation process.

    cepdnaclk/e19-4yp-Quality-Assessment-of-Final-Root-Canal-Treatment-Using-Intra-Oral-Periapical-Radiographs’s past year of commit activity
    Python 0 2 0 0 Updated Jan 19, 2025
  • e19-3yp-beehive-monitoring-system Public

    A beehive monitoring system using high quality camera and some sensors to detect bee absconding.

    cepdnaclk/e19-3yp-beehive-monitoring-system’s past year of commit activity
    JavaScript 1 MIT 5 5 0 Updated Jan 19, 2025
  • cepdnaclk/e20-co543-real-time-shadow-removal-from-images’s past year of commit activity
    0 0 0 0 Updated Jan 18, 2025
  • cepdnaclk/e20-3yp-Smart-Vehicle-Tracking-and-Management-System’s past year of commit activity
    0 0 0 0 Updated Jan 17, 2025
  • e20-co502-RV32IM_Pipelined_Processor_Group-06 Public

    RISC-V pipeline processor: A high-performance, open-source CPU design implementing RISC-V architecture with efficient instruction pipeline execution.

    cepdnaclk/e20-co502-RV32IM_Pipelined_Processor_Group-06’s past year of commit activity
    Verilog 0 0 7 0 Updated Jan 15, 2025
  • e19-co327-Kernel-Modules Public

    In this project, I will develop kernel modules in a Linux system

    cepdnaclk/e19-co327-Kernel-Modules’s past year of commit activity
    C 1 1 0 0 Updated Jan 15, 2025
  • e20-co502-RV32IM_Pipelined_Processor_Group-05 Public

    The RV32IM pipeline processor project designs a 32-bit RISC-V processor with 5 stages: IF, ID, EX, MEM, WB. It supports RV32I base and M-extension (MUL/DIV), using forwarding, stalling, and branch prediction to manage hazards. Implemented in Verilog, it is simulated, tested with RISC-V tools, and optimized for performance.

    cepdnaclk/e20-co502-RV32IM_Pipelined_Processor_Group-05’s past year of commit activity
    Verilog 0 1 0 0 Updated Jan 15, 2025

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