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Reset DMA channel correctly. (google#196)
- If we clear dmaInterrupt, the cs will be non-zero state (DreqStopsDMA|Paused|End) and IsAvaiable() returns false. - nextCB is not supposed to be written directly. p.40, 4.2.1 DMA Channel Register Address Map Only three registers in each channels register set are directly writeable (CS, CONBLK_AD and DEBUG). The other registers (TI, SOURCE_AD, DEST_AD, TXFR_LEN, STRIDE & NEXTCONBK), are automatically loaded from a Control Block data structure held in external memory.
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