mmc: sdhci: pxav3: controller needs 32 bit ADMA addressing

Enable the quirk. (Best used in conjunction with patch downgrading ADMA to SDMA when transfer is not aligned.) Signed-off-by: Philip Rakity <[email protected]> Acked-by: Zhangfei Gao <[email protected]> Signed-off-by: Chris Ball <[email protected]>
chrispat · Aug 13, 2011 · 606a15e · 606a15e
1 parent 7886961
commit 606a15e
Showing 1 changed file with 2 additions and 1 deletion.
diff --git a/drivers/mmc/host/sdhci-pxav3.c b/drivers/mmc/host/sdhci-pxav3.c
@@ -195,7 +195,8 @@ static int __devinit sdhci_pxav3_probe(struct platform_device *pdev)
 	clk_enable(clk);
 
 	host->quirks = SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
-		| SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC;
+		| SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
+		| SDHCI_QUIRK_32BIT_ADMA_SIZE;
 
 	/* enable 1/8V DDR capable */
 	host->mmc->caps |= MMC_CAP_1_8V_DDR;