Kconfig: Use a short, consistent style for prompts

Consistently use

    config FOO
            bool/int/hex/string "Prompt text"

instead of

    config FOO
            bool/int/hex/string
            prompt "Prompt text"

(...and a bunch of other variations that e.g. swapped the order of the
type and the 'prompt', or put other properties between them).

The shorthand is fully equivalent to using 'prompt'. It saves lines and
avoids tricking people into thinking there is some semantic difference.

Most of the grunt work was done by a modified version of
https://unix.stackexchange.com/questions/26284/
how-can-i-use-sed-to-replace-a-multi-line-string/26290#26290, but some
of the rarer variations had to be converted manually.

Signed-off-by: Ulf Magnusson <[email protected]>

arch/Kconfig

@@ -127,8 +127,7 @@ config DYNAMIC_OBJECTS
 	zero.
 
 config SIMPLE_FATAL_ERROR_HANDLER
-	prompt "Simple system fatal error handler"
-	bool
+	bool "Simple system fatal error handler"
 	default y if !MULTITHREADING
 	help
 	  Provides an implementation of _SysFatalErrorHandler() that hard hangs
@@ -141,16 +140,14 @@ menu "Interrupt Configuration"
 # Interrupt related configs
 #
 config GEN_ISR_TABLES
-	bool
-	prompt "Use generated IRQ tables"
+	bool "Use generated IRQ tables"
 	help
 	  This option controls whether a platform uses the gen_isr_tables
 	  script to generate its interrupt tables. This mechanism will create
 	  an appropriate hardware vector table and/or software IRQ table.
 
 config GEN_IRQ_VECTOR_TABLE
-	bool
-	prompt "Generate an interrupt vector table"
+	bool "Generate an interrupt vector table"
 	default y
 	depends on GEN_ISR_TABLES
 	help
@@ -162,8 +159,7 @@ config GEN_IRQ_VECTOR_TABLE
 	  supplied by the application or architecture code.
 
 config GEN_SW_ISR_TABLE
-	bool
-	prompt "Generate a software ISR table"
+	bool "Generate a software ISR table"
 	default y
 	depends on GEN_ISR_TABLES
 	help
@@ -267,8 +263,7 @@ menu "Floating Point Options"
 depends on CPU_HAS_FPU
 
 config FLOAT
-	bool
-	prompt "Floating point registers"
+	bool "Floating point registers"
 	help
 	  This option allows threads to use the floating point registers.
 	  By default, only a single thread may use the registers.
@@ -277,8 +272,7 @@ config FLOAT
 	  floating point register will get a fatal exception.
 
 config FP_SHARING
-	bool
-	prompt "Floating point register sharing"
+	bool "Floating point register sharing"
 	depends on FLOAT
 	help
 	  This option allows multiple threads to use the floating point

arch/arc/Kconfig

@@ -59,8 +59,7 @@ config	DATA_ENDIANNESS_LITTLE
 	  implemented as big endian.
 
 config	NUM_IRQ_PRIO_LEVELS
-	int
-	prompt "Number of supported interrupt priority levels"
+	int "Number of supported interrupt priority levels"
 	range 1 16
 	help
 	  Interrupt priorities available will be 0 to NUM_IRQ_PRIO_LEVELS-1.
@@ -69,8 +68,7 @@ config	NUM_IRQ_PRIO_LEVELS
 	  The BSP must provide a valid default for proper operation.
 
 config	NUM_IRQS
-	int
-	prompt "Upper limit of interrupt numbers/IDs used"
+	int "Upper limit of interrupt numbers/IDs used"
 	range 17 256
 	help
 	  Interrupts available will be 0 to NUM_IRQS-1.
@@ -81,8 +79,7 @@ config	NUM_IRQS
 	  vector table.
 
 config	RGF_NUM_BANKS
-	int
-	prompt "Number of General Purpose Register Banks"
+	int "Number of General Purpose Register Banks"
 	depends on CPU_ARCV2
 	range 1 2
 	default 2
@@ -95,8 +92,7 @@ config	RGF_NUM_BANKS
 	  and restore general purpose registers.
 
 config ARC_FIRQ
-	bool
-	prompt "FIRQ enable"
+	bool "FIRQ enable"
 	default y
 	help
 	  Fast interrupts are supported (FIRQ). If FIRQ enabled, for interrupts
@@ -114,8 +110,7 @@ config	ARC_STACK_CHECKING
 	  enables code that allows using this debug feature
 
 config	FAULT_DUMP
-	int
-	prompt "Fault dump level"
+	int "Fault dump level"
 	default 2
 	range 0 2
 	help
@@ -139,15 +134,13 @@ config GEN_IRQ_START_VECTOR
 	default 16
 
 config HARVARD
-	prompt "Harvard Architecture"
-	bool
+	bool "Harvard Architecture"
 	help
 	  The ARC CPU can be configured to have two busses;
 	  one for instruction fetching and another that serves as a data bus.
 
 config CODE_DENSITY
-	prompt "Code Density Option"
-	bool
+	bool "Code Density Option"
 	help
 	  Enable code density option to get better code density
 
@@ -172,8 +165,7 @@ source "arch/arc/core/mpu/Kconfig"
 endmenu
 
 config CACHE_LINE_SIZE_DETECT
-	bool
-	prompt "Detect d-cache line size at runtime"
+	bool "Detect d-cache line size at runtime"
 	help
 	  This option enables querying the d-cache build register for finding
 	  the d-cache line size at the expense of taking more memory and code
@@ -183,8 +175,7 @@ config CACHE_LINE_SIZE_DETECT
 	  option and manually enter the value for CACHE_LINE_SIZE.
 
 config CACHE_LINE_SIZE
-	int
-	prompt "Cache line size" if !CACHE_LINE_SIZE_DETECT
+	int "Cache line size" if !CACHE_LINE_SIZE_DETECT
 	default 32
 	help
 	  Size in bytes of a CPU d-cache line.
@@ -195,8 +186,7 @@ config ARCH_CACHE_FLUSH_DETECT
 	bool
 
 config CACHE_FLUSHING
-	bool
-	prompt "Enable d-cache flushing mechanism"
+	bool "Enable d-cache flushing mechanism"
 	help
 	  This links in the sys_cache_flush() function, which provides a
 	  way to flush multiple lines of the d-cache.

arch/arc/core/mpu/Kconfig

@@ -6,8 +6,7 @@
 # SPDX-License-Identifier: Apache-2.0
 #
 config ARC_MPU_VER
-	int
-	prompt "ARC MPU version"
+	int "ARC MPU version"
 	range 2 4
 	default 2
 	help

arch/arm/core/cortex_m/Kconfig

@@ -276,16 +276,14 @@ config DATA_ENDIANNESS_LITTLE
 	  implemented as big endian.
 
 config STACK_ALIGN_DOUBLE_WORD
-	bool
-	prompt "Align stacks on double-words (8 octets)"
+	bool "Align stacks on double-words (8 octets)"
 	default y
 	help
 	  This is needed to conform to AAPCS, the procedure call standard for
 	  the ARM. It wastes stack space.
 
 config RUNTIME_NMI
-	bool
-	prompt "Attach an NMI handler at runtime"
+	bool "Attach an NMI handler at runtime"
 	select REBOOT
 	help
 	  The kernel provides a simple NMI handler that simply hangs in a tight
@@ -294,8 +292,7 @@ config RUNTIME_NMI
 	  needed, enable this option and attach it via _NmiHandlerSet().
 
 config FAULT_DUMP
-	int
-	prompt "Fault dump level"
+	int "Fault dump level"
 	default 2
 	range 0 2
 	help
@@ -320,8 +317,7 @@ config GEN_ISR_TABLES
 	default y
 
 config ZERO_LATENCY_IRQS
-	bool
-	prompt "Enable zero-latency interrupts"
+	bool "Enable zero-latency interrupts"
 	depends on CPU_CORTEX_M_HAS_BASEPRI
 	help
 	  The kernel may reserve some of the highest interrupts priorities in
@@ -337,8 +333,7 @@ config ZERO_LATENCY_IRQS
 	  kernel functionality.
 
 config SW_VECTOR_RELAY
-	bool
-	prompt "Enable Software Vector Relay"
+	bool "Enable Software Vector Relay"
 	default y if BOOTLOADER_MCUBOOT
 	depends on ARMV6_M_ARMV8_M_BASELINE && !(CPU_CORTEX_M0_HAS_VECTOR_TABLE_REMAP || CPU_CORTEX_M_HAS_VTOR)
 	help
@@ -350,8 +345,7 @@ config SW_VECTOR_RELAY
 	  relocation table mechanisms.
 
 config PLATFORM_SPECIFIC_INIT
-	bool
-	prompt "Enable platform (SOC) specific startup hook"
+	bool "Enable platform (SOC) specific startup hook"
 	help
 	  The platform specific initialization code (_PlatformInit) is executed
 	  at the beginning of the startup code (__start).

arch/arm/soc/nxp_kinetis/k6x/Kconfig.soc

@@ -68,32 +68,28 @@ config SOC_PART_NUMBER_KINETIS_K6X
 	  the default value for this string.
 
 config K64_CORE_CLOCK_DIVIDER
-	int
-	prompt "Freescale K64 core clock divider"
+	int "Freescale K64 core clock divider"
 	default 1
 	help
 	  This option specifies the divide value for the K64 processor core clock
 	  from the system clock.
 
 config K64_BUS_CLOCK_DIVIDER
-	int
-	prompt "Freescale K64 bus clock divider"
+	int "Freescale K64 bus clock divider"
 	default 2
 	help
 	  This option specifies the divide value for the K64 bus clock from the
 	  system clock.
 
 config K64_FLEXBUS_CLOCK_DIVIDER
-	int
-	prompt "Freescale K64 FlexBus clock divider"
+	int "Freescale K64 FlexBus clock divider"
 	default 3
 	help
 	  This option specifies the divide value for the K64 FlexBus clock from the
 	  system clock.
 
 config K64_FLASH_CLOCK_DIVIDER
-	int
-	prompt "Freescale K64 flash clock divider"
+	int "Freescale K64 flash clock divider"
 	default 5
 	help
 	  This option specifies the divide value for the K64 flash clock from the

arch/arm/soc/nxp_kinetis/kwx/Kconfig.soc

@@ -88,24 +88,21 @@ config SOC_PART_NUMBER_KINETIS_KWX
 if SOC_MKW24D5 || SOC_MKW22D5
 
 config KW2XD_CORE_CLOCK_DIVIDER
-	int
-	prompt "KW2xD core clock divider"
+	int "KW2xD core clock divider"
 	default 1
 	help
 	  This option specifies the divide value for the KW2xD processor core
 	  clock from the system clock.
 
 config KW2XD_BUS_CLOCK_DIVIDER
-	int
-	prompt "KW2xD bus clock divider"
+	int "KW2xD bus clock divider"
 	default 1
 	help
 	  This option specifies the divide value for the KW2xD bus clock from
 	  the system clock.
 
 config KW2XD_FLASH_CLOCK_DIVIDER
-	int
-	prompt "KW2xD flash clock divider"
+	int "KW2xD flash clock divider"
 	default 2
 	help
 	  This option specifies the divide value for the KW2xD flash clock from

arch/x86/Kconfig

@@ -64,8 +64,7 @@ config CPU_APOLLO_LAKE
 menu "Processor Capabilities"
 
 config X86_IAMCU
-	bool
-	prompt "IAMCU calling convention"
+	bool "IAMCU calling convention"
 	help
 	  The IAMCU calling convention changes the X86 C calling convention to
 	  pass some arguments via registers allowing for code size and performance
@@ -76,16 +75,14 @@ config X86_IAMCU
 
 menu "Memory Management"
 config X86_MMU
-	bool
-	prompt "Enable Memory Management Unit"
+	bool "Enable Memory Management Unit"
 	help
 	  This options enables the memory management unit present in x86. Enabling
 	  this will create boot time page table structure.
 
 config X86_PAE_MODE
-	bool
+	bool "Enable PAE page tables"
 	depends on X86_MMU
-	prompt "Enable PAE page tables"
 	help
 	  When selected the Page address extension mode is enabled. The PAE
 	  page tables provides a mechanism to selectively disable execution.
@@ -152,15 +149,13 @@ menu "Architecture Floating Point Options"
 depends on CPU_HAS_FPU
 
 config SSE
-	bool
-	prompt "SSE registers"
+	bool "SSE registers"
 	depends on FLOAT
 	help
 	  This option enables the use of SSE registers by threads.
 
 config SSE_FP_MATH
-	bool
-	prompt "Compiler-generated SSEx instructions"
+	bool "Compiler-generated SSEx instructions"
 	depends on SSE
 	help
 	  This option allows the compiler to generate SSEx instructions for
@@ -180,8 +175,7 @@ depends on REBOOT
 default REBOOT_RST_CNT
 
 config REBOOT_RST_CNT
-	bool
-	prompt "Reboot via RST_CNT register"
+	bool "Reboot via RST_CNT register"
 	help
 	  Reboot via the RST_CNT register, going back to BIOS.
 
@@ -196,8 +190,7 @@ config ISA_IA32
 	  instruction set architecture.
 
 config IA32_LEGACY_IO_PORTS
-	bool
-	prompt "Support IA32 legacy IO ports"
+	bool "Support IA32 legacy IO ports"
 	depends on ISA_IA32
 	help
 	  This option enables IA32 legacy IO ports. Note these are much slower
@@ -230,8 +223,7 @@ config CACHE_LINE_SIZE
 	  Detect automatically at runtime by selecting CACHE_LINE_SIZE_DETECT.
 
 config CLFLUSH_INSTRUCTION_SUPPORTED
-	bool
-	prompt "CLFLUSH instruction supported"
+	bool "CLFLUSH instruction supported"
 	depends on !CLFLUSH_DETECT && CACHE_FLUSHING
 	help
 	  An implementation of sys_cache_flush() that uses CLFLUSH is made
@@ -242,8 +234,7 @@ config CLFLUSH_INSTRUCTION_SUPPORTED
 	  CLFLUSH support thereby reducing both memory footprint and boot time.
 
 config CLFLUSH_DETECT
-	bool
-	prompt "Detect support of CLFLUSH instruction at runtime"
+	bool "Detect support of CLFLUSH instruction at runtime"
 	depends on CACHE_FLUSHING
 	help
 	  This option should be enabled if it is not known in advance whether the
@@ -262,8 +253,7 @@ config ARCH_CACHE_FLUSH_DETECT
 	depends on CLFLUSH_DETECT
 
 config CACHE_FLUSHING
-	bool
-	prompt "Enable cache flushing mechanism"
+	bool "Enable cache flushing mechanism"
 	help
 	  This links in the sys_cache_flush() function. A mechanism for flushing the
 	  cache must be selected as well. By default, that mechanism is discovered at