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fix: cargo fmt
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jmpnz committed Sep 23, 2023
1 parent 74d67e1 commit 6ce3006
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Showing 3 changed files with 150 additions and 65 deletions.
14 changes: 7 additions & 7 deletions src/arm64.rs
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@ pub fn mask(len: u64, start: u64) -> u64 {

/// Split a u64 into two chunks of high and low bits.
pub fn split(x: u64) -> (u32, u32) {
((x >> 16) as u32, (x as u64 & mask(16, 0)) as u32)
return ((x >> 16) as u32, (x & mask(16, 0)) as u32)
}

#[cfg(test)]
Expand All @@ -19,7 +19,7 @@ mod tests {
// an ARM64 instruction.
// This is useful when loading immediates that don't fit the fixed
// size instruction width of 32-bits.
let x = 0x48f0d0 as i32;
let x = 0x48f0d0i32;
// To read x in x0 we can use a movz movk pair
// movz x0, #0xf0d0
// movk x0, #0x48, lsl #16
Expand All @@ -28,11 +28,11 @@ mod tests {
let hi = x as u64 >> 16;
assert_eq!((hi << 16 | lo) as i32, x);
// Another example with an even bigger integer
let v = 0x1122334455667788 as u64;
let lo_1 = v & mask(16, 0) as u64;
let lo_2 = v & mask(16, 16) as u64;
let lo_3 = v & mask(16, 32) as u64;
let lo_4 = v & mask(16, 48) as u64;
let v = 0x1122334455667788u64;
let lo_1 = v & mask(16, 0);
let lo_2 = v & mask(16, 16);
let lo_3 = v & mask(16, 32);
let lo_4 = v & mask(16, 48);
assert_eq!(lo_4 | lo_3 | lo_2 | lo_1, v);
}
}
30 changes: 15 additions & 15 deletions src/jit.rs
Original file line number Diff line number Diff line change
Expand Up @@ -466,7 +466,7 @@ impl JitCache {
self.registers.push_back(reg)
}

match (dst.clone(), op2, dst) {
match (dst, op2, dst) {
(
Operand::Register(r1),
Operand::Register(r2),
Expand Down Expand Up @@ -511,7 +511,7 @@ mod tests {

use std::slice;

use crate::arm64::{self, mask};
use crate::arm64::{self};

use super::*;
use dynasmrt::dynasm;
Expand All @@ -534,7 +534,7 @@ mod tests {
);
epilogue!(ops);
*buffer = ops.finalize().unwrap();
return start;
return start
}

fn build_test_fn_x86(
Expand All @@ -550,20 +550,20 @@ mod tests {
);
let _offset = builder.as_ref().expect("REASON").offset();
*buffer = builder.expect("REASON").finalize().unwrap();
return dynasmrt::AssemblyOffset(0);
return dynasmrt::AssemblyOffset(0)
}

fn build_test_fn_imm(
buffer: &mut ExecutableBuffer,
) -> dynasmrt::AssemblyOffset {
let mut builder = dynasmrt::x64::Assembler::new();
let mut litpool = LitPool::new();
let offset = litpool.push_u64(0xcafebabe);
let _offset = litpool.push_u64(0xcafebabe);
let a = 0xcafebabe;
let b = 0x0;
let _b = 0x0;

use arm64;
use dynasmrt::DynasmLabelApi;


// let lo = a & mask(16, 0);
let (hi, lo) = arm64::split(a);
Expand All @@ -573,16 +573,16 @@ mod tests {
println!("{:#x}", hi);

dynasm!(builder.as_mut().expect("REASON")
; movz x0, lo as u32
; movk x0, hi as u32, LSL #16
; movz x0, lo
; movk x0, hi, LSL #16
; movz x1, #0
; add x0, x0, x1
; ret
);
litpool.emit(builder.as_mut().unwrap());
let _offset = builder.as_ref().expect("REASON").offset();
*buffer = builder.expect("REASON").finalize().unwrap();
return dynasmrt::AssemblyOffset(0);
return dynasmrt::AssemblyOffset(0)
}

fn build_test_fn_aarch64(
Expand All @@ -609,7 +609,7 @@ mod tests {
.expect("expected valid reference to builder")
.offset();
*buffer = builder.expect("expected builder").finalize().unwrap();
return dynasmrt::AssemblyOffset(0);
return dynasmrt::AssemblyOffset(0)
}

#[ignore = "ignore until unsafe segfault bug is fixed"]
Expand Down Expand Up @@ -671,7 +671,7 @@ mod tests {
assert!(class_file.is_ok());
let program = Program::new(&class_file.unwrap());
let mut runtime = Runtime::new(program);
assert!(runtime.run().is_ok());
runtime.run().unwrap();
assert_eq!(runtime.top_return_value(), Some(Value::Int(55)));
let trace = runtime.recorder.recording();
let mut jit = JitCache::new();
Expand Down Expand Up @@ -704,8 +704,8 @@ mod tests {

let mut my_struct = MyStruct { registers: [0; 8] };

let mut my_vec = MyVecStruct {
registers: vec![0 as u64; 8],
let _my_vec = MyVecStruct {
registers: vec![0u64; 8],
};

unsafe {
Expand All @@ -729,7 +729,7 @@ mod tests {
inout(reg) &mut my_struct.registers => _,
// inout(reg) my_vec.registers.as_mut_ptr() as *mut u64 => _,
);
}
};

// Now, my_struct.registers contains [1, 2, 3, 4, 5, 6, 7, 8]
println!("{:?}", my_struct.registers);
Expand Down
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