Open Design Computer Project - http://open-arch.org/
In order execution processor for MIST32 Type-E arcitecture.
If you need support of Operation System, We offers a MIST1032SA out of order execute processor and MIST1032ISA in order execute processor.
BSD 2-Clause License
See ./LICENSE
com : Common file. Source path, Include path...
src : Source
sim : Simulation
./include/processor.h : Processor Infomation
./include/irq.h : Interrupt Infomation
./core/include/core.h : Instruction and Internal format
This project have all IPs for simulation. But you must add IPs for synthesis.
altera_primitive_dualram_512bit_16word
altera_primitive_sync_fifo_showahead_97in_97out_32depth
We have validated the correctness of this design in the following tools.
Simulator
Modelsim
Synthesis
Quartus II(Altera) / Quartus Prime(Altera)