mpc85xx: add support for Hewlett Packard MSM460

Hardware
--------
CPU:  Freescale P1020 2xe500 PPC
RAM:  256M DDR3 (Micron MT41J64M16JT-15E:G "D9MNJ")
NAND: 128M (Micron 2CA1)
BTN:  1x Reset
LED:  Power - ETH - Radio1 - Radio2
UART: RJ-45 Cisco Pinout - 115200 8N1

Installation
------------
NOTE: You can find a repo with up-to-date instructions as well as
the required files here:

https://github.com/blocktrron/msm460-flashing

Required files
==============
You need a command-files as well as a U-Boot image.

The command-file has the following content (padded to 131072 bytes).

If you copy paste these, remove the newlines!

```
U-BOOT setenv ethaddr 02:03:04:05:06:07; setenv ipaddr 192.168.1.1;
setenv serverip 192.168.1.66; tftpboot 0x3000000 msm460-uboot.bin;
nand device; nand erase 0 0xC0000; nand write 0x3000000 0x0 0xC0000; reset
```

You can download the required U-Boot from this repository:

https://github.com/blocktrron/u-boot-msm/releases

Preparation
===========
Prepare a TFTP server serving two files:

 - U-Boot NAND image as `msm460-uboot.bin`.
 - OpenWrt factory image as `msm460-factory.bin`
 - Command-file names `commands.tftp`

You can start a TFTP server in the current directory using dnsmasq:

```bash
sudo dnsmasq --no-daemon --listen-address=0.0.0.0 \
    --port=0 --enable-tftp=enxd0 --tftp-root="$(pwd)" \
    --user=root --group=root
```
Replace `enxd0` with the name of your network interface.

Procedure
=========
1. Assign yourself the IP-Address 192.168.1.66/24.
3. Connect the Router to the PC while keeping the reset button
   pressed.
4. The LEDs will eventually begin to flash.
   They will start to flash faster after around 15 seconds.
5. Release the reset button.
6. Start a new shell
7. Make sure you are currently in the directory where the tftp server
   is located.
8. Run the following command:

```bash
tftp 192.168.1.1 -m binary -c put commands.tftp nflashd.cccc9999
```

You get the message "Transfer timed out."
To find out if you have been successful, please check the
blinking LED Pattern.

Signed-off-by: David Bauer <[email protected]>

target/linux/mpc85xx/base-files/etc/board.d/01_leds

@@ -16,6 +16,9 @@ extreme-networks,ws-ap3825i)
 	ucidef_set_led_netdev "lan1" "LAN1" "green:lan1" "eth1"
 	ucidef_set_led_netdev "lan2" "LAN2" "green:lan2" "eth0"
 	;;
+hpe,msm460)
+	ucidef_set_led_netdev "lan" "LAN" "green:lan" "eth0"
+	;;
 esac
 
 board_config_flush

target/linux/mpc85xx/base-files/etc/board.d/02_network

@@ -16,6 +16,9 @@ aerohive,hiveap-330|\
 enterasys,ws-ap3715i)
 	ucidef_set_interfaces_lan_wan "eth1" "eth0"
 	;;
+hpe,msm460)
+	ucidef_set_interface_lan "eth0"
+	;;	
 ocedo,panda)
 	ucidef_set_interface_wan "eth1"
 	ucidef_add_switch "switch0" \

target/linux/mpc85xx/base-files/etc/hotplug.d/ieee80211/10-fix-wifi-mac

@@ -20,6 +20,11 @@ enterasys,ws-ap3710i|\
 extreme-networks,ws-ap3825i)
 	mtd_get_mac_ascii cfg2 RADIOADDR${PHYNBR} > /sys${DEVPATH}/macaddress
 	;;
+hpe,msm460)
+	wifi_mac=$(mtd_get_mac_binary colubris-bid 0x1f9bd)
+	[ "$PHYNBR" -eq 0 ] && echo "$wifi_mac" > /sys${DEVPATH}/macaddress
+	[ "$PHYNBR" -eq 1 ] && echo "$(macaddr_add $wifi_mac 16)" > /sys${DEVPATH}/macaddress
+	;;
 ocedo,panda)
 	mtd_get_mac_ascii uboot-env0 wmac$(($PHYNBR + 1)) > /sys${DEVPATH}/macaddress
 	;;

target/linux/mpc85xx/base-files/lib/upgrade/platform.sh

@@ -13,6 +13,7 @@ platform_do_upgrade() {
 	local board=$(board_name)
 
 	case "$board" in
+	hpe,msm460|\
 	ocedo,panda|\
 	sophos,red-15w-rev1|\
 	watchguard,firebox-t10)

target/linux/mpc85xx/config-6.1

@@ -150,6 +150,7 @@ CONFIG_MPIC=y
 # CONFIG_MPIC_MSGR is not set
 CONFIG_MPIC_TIMER=y
 CONFIG_MPILIB=y
+# CONFIG_MSM460 is not set
 # CONFIG_MTD_CFI is not set
 CONFIG_MTD_NAND_CORE=y
 CONFIG_MTD_NAND_ECC=y

target/linux/mpc85xx/config-6.6

@@ -158,6 +158,7 @@ CONFIG_MPIC=y
 # CONFIG_MPIC_MSGR is not set
 CONFIG_MPIC_TIMER=y
 CONFIG_MPILIB=y
+# CONFIG_MSM460 is not set
 # CONFIG_MTD_CFI is not set
 CONFIG_MTD_NAND_CORE=y
 CONFIG_MTD_NAND_ECC=y

target/linux/mpc85xx/files/arch/powerpc/boot/dts/msm460.dts

@@ -0,0 +1,238 @@
+// SPDX-License-Identifier: GPL-2.0-or-later or MIT
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+
+/include/ "fsl/p1020si-pre.dtsi"
+/ {
+	model = "Hewlett-Packard MSM460";
+	compatible = "hpe,msm460";
+
+	aliases {
+		led-boot = &system_green;
+		led-failsafe = &system_green;
+		led-running = &system_green;
+		led-upgrade = &system_green;
+	};
+
+	chosen {
+		/* Needed for initramfs */
+		bootargs-override = "console=ttyS0,115200 ubi.mtd=5,2048";
+		stdout-path = &serial0;
+	};
+
+	memory {
+		device_type = "memory";
+	};
+
+	lbc: localbus@ffe05000 {
+		reg = <0 0xffe05000 0 0x1000>;
+		ranges = <0x0 0x0 0x0 0xec000000 0x04000000
+			  0x1 0x0 0x0 0xff800000 0x00040000
+			  0x2 0x0 0x0 0xffa00000 0x00020000
+			  0x3 0x0 0x0 0xffb00000 0x00020000>;
+
+		nand@1,0 {
+			compatible = "fsl,p1020-fcm-nand", "fsl,elbc-fcm-nand";
+			reg = <0x1 0x0 0x40000>;
+
+			partitions {
+				compatible = "fixed-partitions";
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partition@0 {
+					reg = <0x0 0xc0000>;
+					label = "u-boot";
+					read-only;
+				};
+
+				partition@c0000 {
+					reg = <0xc0000 0x40000>;
+					label = "colubris-bid";
+					read-only;
+
+					nvmem-layout {
+						compatible = "fixed-layout";
+						#address-cells = <1>;
+						#size-cells = <1>;
+
+						macaddr_hwinfo_1f822: macaddr@1f822 {
+							/* ETH */
+							compatible = "mac-base";
+							reg = <0x1f822 0x6>;
+							#nvmem-cell-cells = <1>;
+						};
+
+						macaddr_hwinfo_1f9bd: macaddr@1f9bd {
+							/* WLAN */
+							compatible = "mac-base";
+							reg = <0x1f9bd 0x6>;
+							#nvmem-cell-cells = <1>;
+						};
+					};
+				};
+
+				/* uenv{0,1} and ubi occupy kernel and slash partitions */
+
+				partition@100000 {
+					reg = <0x100000 0x80000>;
+					label = "uboot-env0";
+				};
+
+				partition@180000 {
+					reg = <0x180000 0x80000>;
+					label = "uboot-env1";
+				};
+
+				partition@200000 {
+					reg = <0x200000 0x300000>;
+					label = "reserved";
+				};
+
+				partition@500000 {
+					reg = <0x500000 0x5f00000>;
+					label = "ubi";
+				};
+
+				partition@6500000 {
+					reg = <0x6500000 0x400000>;
+					label = "pool";
+					read-only;
+				};
+
+				partition@6900000 {
+					reg = <0x6900000 0x15e0000>;
+					label = "flash";
+					read-only;
+				};
+
+				partition@7ee0000 {
+					reg = <0x7ee0000 0x20000>;
+					label = "pf";
+					read-only;
+				};
+
+				/* BBT is at the end of the flash - 100000@7f00000 */
+			};
+		};
+	};
+
+	soc: soc@ffe00000 {
+		ranges = <0x0 0x0 0xffe00000 0x100000>;
+
+		i2c@3000 {
+			status = "disabled";
+		};
+
+		gpio0: gpio-controller@fc00 {
+		};
+
+		mdio@24000 {
+			phy0: ethernet-phy@0 {
+				reg = <0x0>;
+				reset-gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
+				reset-assert-us = <10000>;
+				reset-deassert-us = <10000>;
+			};
+		};
+
+		enet0: ethernet@b0000 {
+			phy-connection-type = "rgmii-id";
+			phy-handle = <&phy0>;
+			nvmem-cells = <&macaddr_hwinfo_1f822 0>;
+			nvmem-cell-names = "mac-address";
+		};
+
+		enet1: ethernet@b1000 {
+			status = "disabled";
+		};
+
+		enet2: ethernet@b2000 {
+			status = "disabled";
+		};
+
+		usb@22000 {
+			status = "disabled";
+		};
+
+		usb@23000 {
+			status = "disabled";
+		};
+	};
+
+	pci0: pcie@ffe09000 {
+		ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
+			  0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
+		reg = <0 0xffe09000 0 0x1000>;
+		pcie@0 {
+			ranges = <0x2000000 0x0 0xa0000000
+				  0x2000000 0x0 0xa0000000
+				  0x0 0x20000000
+
+				  0x1000000 0x0 0x0
+				  0x1000000 0x0 0x0
+				  0x0 0x100000>;
+		};
+	};
+
+	pci1: pcie@ffe0a000 {
+		reg = <0 0xffe0a000 0 0x1000>;
+		ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
+			  0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
+		pcie@0 {
+			ranges = <0x2000000 0x0 0x80000000
+				  0x2000000 0x0 0x80000000
+				  0x0 0x20000000
+
+				  0x1000000 0x0 0x0
+				  0x1000000 0x0 0x0
+				  0x0 0x100000>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		system_green: power {
+			gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_POWER;
+			default-state = "on";
+		};
+
+		lan {
+			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_LAN;
+		};
+
+		radio1 {
+			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_WLAN;
+			function-enumerator = <1>;
+			linux,default-trigger = "phy0tpt";
+		};
+
+		radio2 {
+			gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_WLAN;
+			function-enumerator = <2>;
+			linux,default-trigger = "phy1tpt";
+		};
+	};
+
+	buttons {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset-btn";
+			gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+};
+/include/ "fsl/p1020si-post.dtsi"

target/linux/mpc85xx/files/arch/powerpc/platforms/85xx/msm460.c

@@ -0,0 +1,91 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/*
+ * HPE MSM460 Board Setup
+ *
+ * Copyright (C) 2022 David Bauer <[email protected]>
+ *
+ * Based on:
+ *   mpc85xx_rdb.c:
+ *      MPC85xx RDB Board Setup
+ *      Copyright 2013 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/of_platform.h>
+
+#include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
+#include <mm/mmu_decl.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/mpic.h>
+
+#include <sysdev/fsl_soc.h>
+#include <sysdev/fsl_pci.h>
+#include "smp.h"
+
+#include "mpc85xx.h"
+
+void __init msm_pic_init(void)
+{
+	struct mpic *mpic;
+
+	mpic = mpic_alloc(NULL, 0,
+	  MPIC_BIG_ENDIAN |
+	  MPIC_SINGLE_DEST_CPU,
+	  0, 256, " OpenPIC  ");
+
+	BUG_ON(mpic == NULL);
+	mpic_init(mpic);
+}
+
+/*
+ * Setup the architecture
+ */
+static void __init msm_setup_arch(void)
+{
+	if (ppc_md.progress)
+		ppc_md.progress("msm_setup_arch()", 0);
+
+	mpc85xx_smp_init();
+
+	fsl_pci_assign_primary();
+
+	pr_info("MSM460 board from HPE\n");
+}
+
+machine_arch_initcall(msm, mpc85xx_common_publish_devices);
+
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init msm_probe(void)
+{
+	if (of_machine_is_compatible("hpe,msm460"))
+		return 1;
+	return 0;
+}
+
+define_machine(msm) {
+	.name			= "P1020 RDB",
+	.probe			= msm_probe,
+	.setup_arch		= msm_setup_arch,
+	.init_IRQ		= msm_pic_init,
+#ifdef CONFIG_PCI
+	.pcibios_fixup_bus	= fsl_pcibios_fixup_bus,
+	.pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
+#endif
+	.get_irq		= mpic_get_irq,
+	.calibrate_decr		= generic_calibrate_decr,
+	.progress		= udbg_progress,
+};