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Added Cores TG minutes and slides
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Signed-off-by: Arjan Bink <[email protected]>
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# Cores TG Meeting, July 5, 2021

## Attendees
* Jérôme Quevremont (Thales)
* Arjan Bink (Silicon Labs)
* Oystein Knauserud Bink (Silicon Labs)
* Steve Richmond (Silicon Labs)
* Pascal Gouedo (Dolphin)
* Yoann Pruvost (Dolphin)

## Call for participation

We welcome status updates on CV32E40P, CV32E20 and Taiga. Please contact Arjan if you want to present in the next Cores TG meeting(s).

Also noted that (old) github issues on CV32E40P are hardly getting handled; looking for volunteers.

## eXtension interface update

Arjan gave an update about the Silabs alternative proposal for core-v-xif (see CV32E40X user manual for the proposal).

## CV32E40X and CV32E40S update

Oystein gave an update on the CV32E40X and CV32E40S. See slides.

## CVA6 update

Jérôme Quevremont gave an update on the CVA6, focusing on its ongoing specification. Some discussion on sharing FPU related verification work with the CV32E40P project.

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