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Canny-Edge-Detection-on-FPGA
Canny-Edge-Detection-on-FPGA PublicForked from KooJaack/Canny-Edge-Detection-on-FPGA
Implementation of Canny Edge Detection on Cyclone IV. To run project you need Quartus and ModelSim.
Verilog
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Image_sim
Image_sim PublicForked from Nitcloud/Image_sim
基于FPGA的图像处理模块(出自于crazybingo)(将部分IP换为纯Verilog用于跨平台移植)
Verilog
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FusionAccel
FusionAccel PublicForked from isuckatdrifting/FusionAccel
RTL-level Convolutional Network Accelerator Implementation on Xilinx Spartan 6. Evaluation for scalability.
Verilog
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ZYNQ-NVDLA
ZYNQ-NVDLA PublicForked from LeiWang1999/ZYNQ-NVDLA
NVDLA (An Opensource DL Accelerator Framework) implementation on FPGA.
Verilog
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