Complete package of AmiBlitz3 including all sources.

Basic Verilog modules

A very simple SDRAM controller for FPGA written in Verilog. It exposes a SRAM-like interface to the rest of the FPGA fabric

A FPGA-based controller for a winbond W9864G6JT-6 SDRAM. This is a complete Intel Quartus Prime project for the Trenz CYC1000.

The open source Zapier alternative. Build workflow automation without spending time and money.

Intel Quartus Prime Synthesis Engine for Docker

The CYC1000 is the next generation of Arrow’s FPGA IoT/Maker boards based on the latest Intel FPGA family Cyclone 10 LP.

VHDL library 4 FPGAs

Example source code for Youtube series "Amiga Hardware Programming in C"

Amiga C Engine

AmigaED is an example for writing an advanced coder's editor using the Qt5 and QScintilla frameworks in C++, containing a menu bar, toolbars, menus, a custom context menue, an enhanced statusbar an…

A tiny Open POWER ISA softcore written in VHDL 2008

Amiga Blitz Basic demos

OE layer for desktop environments based on Qt5 (KDE KF5+Plasma+Apps / lirios / lxqt / lumina)

QT5 layer for openembedded

LuaJIT v2.1 branch port to PPC64 (see ppc64-port branch) - See the Wiki for current status.

Qt5 library for the Telegram Bot API (https://core.telegram.org/bots/api)

Android application for logging Wifi signal strength by location

An open source multi-modal trip planner

An Android app for multi-modal trip planning and navigation using anyone's OpenTripPlanner server.

Infrastructureless indoor navigation for smart phones