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Merge git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi-rc-fixe…
…s-2.6 * git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi-rc-fixes-2.6: (277 commits) [SCSI] isci: fix checkpatch errors isci: Device reset should request sas_phy_reset(phy, true) isci: pare back error messsages isci: cleanup silicon revision detection isci: merge scu_unsolicited_frame.h into unsolicited_frame_control.h isci: merge sata.[ch] into request.c isci: kill 'get/set' macros isci: retire scic_sds_ and scic_ prefixes isci: unify isci_host and scic_sds_controller isci: unify isci_remote_device and scic_sds_remote_device isci: unify isci_port and scic_sds_port isci: fix scic_sds_remote_device_terminate_requests isci: unify isci_phy and scic_sds_phy isci: unify isci_request and scic_sds_request isci: rename / clean up scic_sds_stp_request isci: preallocate requests isci: combine request flags isci: unify can_queue tracking on the tci_pool, uplevel tag assignment isci: Terminate dev requests on FIS err bit rx in NCQ isci: fix frame received locking ...
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obj-$(CONFIG_SCSI_ISCI) += isci.o | ||
isci-objs := init.o phy.o request.o \ | ||
remote_device.o port.o \ | ||
host.o task.o probe_roms.o \ | ||
remote_node_context.o \ | ||
remote_node_table.o \ | ||
unsolicited_frame_control.o \ | ||
port_config.o \ |
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# Makefile for create_fw | ||
# | ||
CC=gcc | ||
CFLAGS=-c -Wall -O2 -g | ||
LDFLAGS= | ||
SOURCES=create_fw.c | ||
OBJECTS=$(SOURCES:.cpp=.o) | ||
EXECUTABLE=create_fw | ||
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all: $(SOURCES) $(EXECUTABLE) | ||
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$(EXECUTABLE): $(OBJECTS) | ||
$(CC) $(LDFLAGS) $(OBJECTS) -o $@ | ||
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.c.o: | ||
$(CC) $(CFLAGS) $< -O $@ | ||
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clean: | ||
rm -f *.o $(EXECUTABLE) |
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This defines the temporary binary blow we are to pass to the SCU | ||
driver to emulate the binary firmware that we will eventually be | ||
able to access via NVRAM on the SCU controller. | ||
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The current size of the binary blob is expected to be 149 bytes or larger | ||
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Header Types: | ||
0x1: Phy Masks | ||
0x2: Phy Gens | ||
0x3: SAS Addrs | ||
0xff: End of Data | ||
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ID string - u8[12]: "#SCU MAGIC#\0" | ||
Version - u8: 1 | ||
SubVersion - u8: 0 | ||
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Header Type - u8: 0x1 | ||
Size - u8: 8 | ||
Phy Mask - u32[8] | ||
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Header Type - u8: 0x2 | ||
Size - u8: 8 | ||
Phy Gen - u32[8] | ||
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Header Type - u8: 0x3 | ||
Size - u8: 8 | ||
Sas Addr - u64[8] | ||
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Header Type - u8: 0xf | ||
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============================================================================== | ||
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Place isci_firmware.bin in /lib/firmware | ||
Be sure to recreate the initramfs image to include the firmware. | ||
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#include <stdio.h> | ||
#include <stdlib.h> | ||
#include <unistd.h> | ||
#include <sys/types.h> | ||
#include <sys/stat.h> | ||
#include <fcntl.h> | ||
#include <string.h> | ||
#include <errno.h> | ||
#include <asm/types.h> | ||
#include <strings.h> | ||
#include <stdint.h> | ||
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#include "create_fw.h" | ||
#include "../probe_roms.h" | ||
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int write_blob(struct isci_orom *isci_orom) | ||
{ | ||
FILE *fd; | ||
int err; | ||
size_t count; | ||
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fd = fopen(blob_name, "w+"); | ||
if (!fd) { | ||
perror("Open file for write failed"); | ||
fclose(fd); | ||
return -EIO; | ||
} | ||
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count = fwrite(isci_orom, sizeof(struct isci_orom), 1, fd); | ||
if (count != 1) { | ||
perror("Write data failed"); | ||
fclose(fd); | ||
return -EIO; | ||
} | ||
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fclose(fd); | ||
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return 0; | ||
} | ||
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void set_binary_values(struct isci_orom *isci_orom) | ||
{ | ||
int ctrl_idx, phy_idx, port_idx; | ||
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/* setting OROM signature */ | ||
strncpy(isci_orom->hdr.signature, sig, strlen(sig)); | ||
isci_orom->hdr.version = version; | ||
isci_orom->hdr.total_block_length = sizeof(struct isci_orom); | ||
isci_orom->hdr.hdr_length = sizeof(struct sci_bios_oem_param_block_hdr); | ||
isci_orom->hdr.num_elements = num_elements; | ||
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for (ctrl_idx = 0; ctrl_idx < 2; ctrl_idx++) { | ||
isci_orom->ctrl[ctrl_idx].controller.mode_type = mode_type; | ||
isci_orom->ctrl[ctrl_idx].controller.max_concurrent_dev_spin_up = | ||
max_num_concurrent_dev_spin_up; | ||
isci_orom->ctrl[ctrl_idx].controller.do_enable_ssc = | ||
enable_ssc; | ||
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for (port_idx = 0; port_idx < 4; port_idx++) | ||
isci_orom->ctrl[ctrl_idx].ports[port_idx].phy_mask = | ||
phy_mask[ctrl_idx][port_idx]; | ||
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for (phy_idx = 0; phy_idx < 4; phy_idx++) { | ||
isci_orom->ctrl[ctrl_idx].phys[phy_idx].sas_address.high = | ||
(__u32)(sas_addr[ctrl_idx][phy_idx] >> 32); | ||
isci_orom->ctrl[ctrl_idx].phys[phy_idx].sas_address.low = | ||
(__u32)(sas_addr[ctrl_idx][phy_idx]); | ||
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isci_orom->ctrl[ctrl_idx].phys[phy_idx].afe_tx_amp_control0 = | ||
afe_tx_amp_control0; | ||
isci_orom->ctrl[ctrl_idx].phys[phy_idx].afe_tx_amp_control1 = | ||
afe_tx_amp_control1; | ||
isci_orom->ctrl[ctrl_idx].phys[phy_idx].afe_tx_amp_control2 = | ||
afe_tx_amp_control2; | ||
isci_orom->ctrl[ctrl_idx].phys[phy_idx].afe_tx_amp_control3 = | ||
afe_tx_amp_control3; | ||
} | ||
} | ||
} | ||
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int main(void) | ||
{ | ||
int err; | ||
struct isci_orom *isci_orom; | ||
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isci_orom = malloc(sizeof(struct isci_orom)); | ||
memset(isci_orom, 0, sizeof(struct isci_orom)); | ||
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set_binary_values(isci_orom); | ||
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err = write_blob(isci_orom); | ||
if (err < 0) { | ||
free(isci_orom); | ||
return err; | ||
} | ||
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free(isci_orom); | ||
return 0; | ||
} |
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#ifndef _CREATE_FW_H_ | ||
#define _CREATE_FW_H_ | ||
#include "../probe_roms.h" | ||
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/* we are configuring for 2 SCUs */ | ||
static const int num_elements = 2; | ||
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/* | ||
* For all defined arrays: | ||
* elements 0-3 are for SCU0, ports 0-3 | ||
* elements 4-7 are for SCU1, ports 0-3 | ||
* | ||
* valid configurations for one SCU are: | ||
* P0 P1 P2 P3 | ||
* ---------------- | ||
* 0xF,0x0,0x0,0x0 # 1 x4 port | ||
* 0x3,0x0,0x4,0x8 # Phys 0 and 1 are a x2 port, phy 2 and phy 3 are each x1 | ||
* # ports | ||
* 0x1,0x2,0xC,0x0 # Phys 0 and 1 are each x1 ports, phy 2 and phy 3 are a x2 | ||
* # port | ||
* 0x3,0x0,0xC,0x0 # Phys 0 and 1 are a x2 port, phy 2 and phy 3 are a x2 port | ||
* 0x1,0x2,0x4,0x8 # Each phy is a x1 port (this is the default configuration) | ||
* | ||
* if there is a port/phy on which you do not wish to override the default | ||
* values, use the value assigned to UNINIT_PARAM (255). | ||
*/ | ||
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/* discovery mode type (port auto config mode by default ) */ | ||
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/* | ||
* if there is a port/phy on which you do not wish to override the default | ||
* values, use the value "0000000000000000". SAS address of zero's is | ||
* considered invalid and will not be used. | ||
*/ | ||
#ifdef MPC | ||
static const int mode_type = SCIC_PORT_MANUAL_CONFIGURATION_MODE; | ||
static const __u8 phy_mask[2][4] = { {1, 2, 4, 8}, | ||
{1, 2, 4, 8} }; | ||
static const unsigned long long sas_addr[2][4] = { { 0x5FCFFFFFF0000001ULL, | ||
0x5FCFFFFFF0000002ULL, | ||
0x5FCFFFFFF0000003ULL, | ||
0x5FCFFFFFF0000004ULL }, | ||
{ 0x5FCFFFFFF0000005ULL, | ||
0x5FCFFFFFF0000006ULL, | ||
0x5FCFFFFFF0000007ULL, | ||
0x5FCFFFFFF0000008ULL } }; | ||
#else /* APC (default) */ | ||
static const int mode_type = SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE; | ||
static const __u8 phy_mask[2][4]; | ||
static const unsigned long long sas_addr[2][4] = { { 0x5FCFFFFF00000001ULL, | ||
0x5FCFFFFF00000001ULL, | ||
0x5FCFFFFF00000001ULL, | ||
0x5FCFFFFF00000001ULL }, | ||
{ 0x5FCFFFFF00000002ULL, | ||
0x5FCFFFFF00000002ULL, | ||
0x5FCFFFFF00000002ULL, | ||
0x5FCFFFFF00000002ULL } }; | ||
#endif | ||
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/* Maximum number of concurrent device spin up */ | ||
static const int max_num_concurrent_dev_spin_up = 1; | ||
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/* enable of ssc operation */ | ||
static const int enable_ssc; | ||
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/* AFE_TX_AMP_CONTROL */ | ||
static const unsigned int afe_tx_amp_control0 = 0x000bdd08; | ||
static const unsigned int afe_tx_amp_control1 = 0x000ffc00; | ||
static const unsigned int afe_tx_amp_control2 = 0x000b7c09; | ||
static const unsigned int afe_tx_amp_control3 = 0x000afc6e; | ||
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static const char blob_name[] = "isci_firmware.bin"; | ||
static const char sig[] = "ISCUOEMB"; | ||
static const unsigned char version = 0x10; | ||
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#endif |
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