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pflash: Rename pflash_t to PFlashCFI01, PFlashCFI02
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flash.h's incomplete struct pflash_t is completed both in
pflash_cfi01.c and in pflash_cfi02.c.  The complete types are
incompatible.  This can hide type errors, such as passing a pflash_t
created with pflash_cfi02_register() to pflash_cfi01_get_memory().

Furthermore, POSIX reserves typedef names ending with _t.

Rename the two structs to PFlashCFI01 and PFlashCFI02.

Signed-off-by: Markus Armbruster <[email protected]>
Reviewed-by: Alex Bennée <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Tested-by: Philippe Mathieu-Daudé <[email protected]>
Message-Id: <[email protected]>
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Markus Armbruster committed Mar 11, 2019
1 parent 377b155 commit 1643406
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Showing 7 changed files with 125 additions and 110 deletions.
8 changes: 4 additions & 4 deletions hw/arm/vexpress.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -512,8 +512,8 @@ static void vexpress_modify_dtb(const struct arm_boot_info *info, void *fdt)
/* Open code a private version of pflash registration since we
* need to set non-default device width for VExpress platform.
*/
static pflash_t *ve_pflash_cfi01_register(hwaddr base, const char *name,
DriveInfo *di)
static PFlashCFI01 *ve_pflash_cfi01_register(hwaddr base, const char *name,
DriveInfo *di)
{
DeviceState *dev = qdev_create(NULL, "cfi.pflash01");

Expand All @@ -536,7 +536,7 @@ static pflash_t *ve_pflash_cfi01_register(hwaddr base, const char *name,
qdev_init_nofail(dev);

sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
return OBJECT_CHECK(pflash_t, (dev), "cfi.pflash01");
return OBJECT_CHECK(PFlashCFI01, (dev), "cfi.pflash01");
}

static void vexpress_common_init(MachineState *machine)
Expand All @@ -548,7 +548,7 @@ static void vexpress_common_init(MachineState *machine)
qemu_irq pic[64];
uint32_t sys_id;
DriveInfo *dinfo;
pflash_t *pflash0;
PFlashCFI01 *pflash0;
I2CBus *i2c;
ram_addr_t vram_size, sram_size;
MemoryRegion *sysmem = get_system_memory();
Expand Down
89 changes: 46 additions & 43 deletions hw/block/pflash_cfi01.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -65,12 +65,13 @@ do { \
#define DPRINTF(fmt, ...) do { } while (0)
#endif

#define CFI_PFLASH01(obj) OBJECT_CHECK(pflash_t, (obj), TYPE_CFI_PFLASH01)
#define CFI_PFLASH01(obj) \
OBJECT_CHECK(PFlashCFI01, (obj), TYPE_CFI_PFLASH01)

#define PFLASH_BE 0
#define PFLASH_SECURE 1

struct pflash_t {
struct PFlashCFI01 {
/*< private >*/
SysBusDevice parent_obj;
/*< public >*/
Expand Down Expand Up @@ -109,17 +110,17 @@ static const VMStateDescription vmstate_pflash = {
.minimum_version_id = 1,
.post_load = pflash_post_load,
.fields = (VMStateField[]) {
VMSTATE_UINT8(wcycle, pflash_t),
VMSTATE_UINT8(cmd, pflash_t),
VMSTATE_UINT8(status, pflash_t),
VMSTATE_UINT64(counter, pflash_t),
VMSTATE_UINT8(wcycle, PFlashCFI01),
VMSTATE_UINT8(cmd, PFlashCFI01),
VMSTATE_UINT8(status, PFlashCFI01),
VMSTATE_UINT64(counter, PFlashCFI01),
VMSTATE_END_OF_LIST()
}
};

static void pflash_timer (void *opaque)
{
pflash_t *pfl = opaque;
PFlashCFI01 *pfl = opaque;

trace_pflash_timer_expired(pfl->cmd);
/* Reset flash */
Expand All @@ -133,7 +134,7 @@ static void pflash_timer (void *opaque)
* If this code is called we know we have a device_width set for
* this flash.
*/
static uint32_t pflash_cfi_query(pflash_t *pfl, hwaddr offset)
static uint32_t pflash_cfi_query(PFlashCFI01 *pfl, hwaddr offset)
{
int i;
uint32_t resp = 0;
Expand Down Expand Up @@ -193,7 +194,7 @@ static uint32_t pflash_cfi_query(pflash_t *pfl, hwaddr offset)


/* Perform a device id query based on the bank width of the flash. */
static uint32_t pflash_devid_query(pflash_t *pfl, hwaddr offset)
static uint32_t pflash_devid_query(PFlashCFI01 *pfl, hwaddr offset)
{
int i;
uint32_t resp;
Expand Down Expand Up @@ -241,7 +242,7 @@ static uint32_t pflash_devid_query(pflash_t *pfl, hwaddr offset)
return resp;
}

static uint32_t pflash_data_read(pflash_t *pfl, hwaddr offset,
static uint32_t pflash_data_read(PFlashCFI01 *pfl, hwaddr offset,
int width, int be)
{
uint8_t *p;
Expand Down Expand Up @@ -284,8 +285,8 @@ static uint32_t pflash_data_read(pflash_t *pfl, hwaddr offset,
return ret;
}

static uint32_t pflash_read (pflash_t *pfl, hwaddr offset,
int width, int be)
static uint32_t pflash_read(PFlashCFI01 *pfl, hwaddr offset,
int width, int be)
{
hwaddr boff;
uint32_t ret;
Expand Down Expand Up @@ -398,7 +399,7 @@ static uint32_t pflash_read (pflash_t *pfl, hwaddr offset,
}

/* update flash content on disk */
static void pflash_update(pflash_t *pfl, int offset,
static void pflash_update(PFlashCFI01 *pfl, int offset,
int size)
{
int offset_end;
Expand All @@ -412,7 +413,7 @@ static void pflash_update(pflash_t *pfl, int offset,
}
}

static inline void pflash_data_write(pflash_t *pfl, hwaddr offset,
static inline void pflash_data_write(PFlashCFI01 *pfl, hwaddr offset,
uint32_t value, int width, int be)
{
uint8_t *p = pfl->storage;
Expand Down Expand Up @@ -448,7 +449,7 @@ static inline void pflash_data_write(pflash_t *pfl, hwaddr offset,

}

static void pflash_write(pflash_t *pfl, hwaddr offset,
static void pflash_write(PFlashCFI01 *pfl, hwaddr offset,
uint32_t value, int width, int be)
{
uint8_t *p;
Expand Down Expand Up @@ -654,7 +655,7 @@ static void pflash_write(pflash_t *pfl, hwaddr offset,
static MemTxResult pflash_mem_read_with_attrs(void *opaque, hwaddr addr, uint64_t *value,
unsigned len, MemTxAttrs attrs)
{
pflash_t *pfl = opaque;
PFlashCFI01 *pfl = opaque;
bool be = !!(pfl->features & (1 << PFLASH_BE));

if ((pfl->features & (1 << PFLASH_SECURE)) && !attrs.secure) {
Expand All @@ -668,7 +669,7 @@ static MemTxResult pflash_mem_read_with_attrs(void *opaque, hwaddr addr, uint64_
static MemTxResult pflash_mem_write_with_attrs(void *opaque, hwaddr addr, uint64_t value,
unsigned len, MemTxAttrs attrs)
{
pflash_t *pfl = opaque;
PFlashCFI01 *pfl = opaque;
bool be = !!(pfl->features & (1 << PFLASH_BE));

if ((pfl->features & (1 << PFLASH_SECURE)) && !attrs.secure) {
Expand All @@ -687,7 +688,7 @@ static const MemoryRegionOps pflash_cfi01_ops = {

static void pflash_cfi01_realize(DeviceState *dev, Error **errp)
{
pflash_t *pfl = CFI_PFLASH01(dev);
PFlashCFI01 *pfl = CFI_PFLASH01(dev);
uint64_t total_len;
int ret;
uint64_t blocks_per_device, sector_len_per_device, device_len;
Expand Down Expand Up @@ -864,14 +865,14 @@ static void pflash_cfi01_realize(DeviceState *dev, Error **errp)
}

static Property pflash_cfi01_properties[] = {
DEFINE_PROP_DRIVE("drive", struct pflash_t, blk),
DEFINE_PROP_DRIVE("drive", PFlashCFI01, blk),
/* num-blocks is the number of blocks actually visible to the guest,
* ie the total size of the device divided by the sector length.
* If we're emulating flash devices wired in parallel the actual
* number of blocks per indvidual device will differ.
*/
DEFINE_PROP_UINT32("num-blocks", struct pflash_t, nb_blocs, 0),
DEFINE_PROP_UINT64("sector-length", struct pflash_t, sector_len, 0),
DEFINE_PROP_UINT32("num-blocks", PFlashCFI01, nb_blocs, 0),
DEFINE_PROP_UINT64("sector-length", PFlashCFI01, sector_len, 0),
/* width here is the overall width of this QEMU device in bytes.
* The QEMU device may be emulating a number of flash devices
* wired up in parallel; the width of each individual flash
Expand All @@ -888,17 +889,17 @@ static Property pflash_cfi01_properties[] = {
* 16 bit devices making up a 32 bit wide QEMU device. This
* is deprecated for new uses of this device.
*/
DEFINE_PROP_UINT8("width", struct pflash_t, bank_width, 0),
DEFINE_PROP_UINT8("device-width", struct pflash_t, device_width, 0),
DEFINE_PROP_UINT8("max-device-width", struct pflash_t, max_device_width, 0),
DEFINE_PROP_BIT("big-endian", struct pflash_t, features, PFLASH_BE, 0),
DEFINE_PROP_BIT("secure", struct pflash_t, features, PFLASH_SECURE, 0),
DEFINE_PROP_UINT16("id0", struct pflash_t, ident0, 0),
DEFINE_PROP_UINT16("id1", struct pflash_t, ident1, 0),
DEFINE_PROP_UINT16("id2", struct pflash_t, ident2, 0),
DEFINE_PROP_UINT16("id3", struct pflash_t, ident3, 0),
DEFINE_PROP_STRING("name", struct pflash_t, name),
DEFINE_PROP_BOOL("old-multiple-chip-handling", struct pflash_t,
DEFINE_PROP_UINT8("width", PFlashCFI01, bank_width, 0),
DEFINE_PROP_UINT8("device-width", PFlashCFI01, device_width, 0),
DEFINE_PROP_UINT8("max-device-width", PFlashCFI01, max_device_width, 0),
DEFINE_PROP_BIT("big-endian", PFlashCFI01, features, PFLASH_BE, 0),
DEFINE_PROP_BIT("secure", PFlashCFI01, features, PFLASH_SECURE, 0),
DEFINE_PROP_UINT16("id0", PFlashCFI01, ident0, 0),
DEFINE_PROP_UINT16("id1", PFlashCFI01, ident1, 0),
DEFINE_PROP_UINT16("id2", PFlashCFI01, ident2, 0),
DEFINE_PROP_UINT16("id3", PFlashCFI01, ident3, 0),
DEFINE_PROP_STRING("name", PFlashCFI01, name),
DEFINE_PROP_BOOL("old-multiple-chip-handling", PFlashCFI01,
old_multiple_chip_handling, false),
DEFINE_PROP_END_OF_LIST(),
};
Expand All @@ -917,7 +918,7 @@ static void pflash_cfi01_class_init(ObjectClass *klass, void *data)
static const TypeInfo pflash_cfi01_info = {
.name = TYPE_CFI_PFLASH01,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(struct pflash_t),
.instance_size = sizeof(PFlashCFI01),
.class_init = pflash_cfi01_class_init,
};

Expand All @@ -928,13 +929,15 @@ static void pflash_cfi01_register_types(void)

type_init(pflash_cfi01_register_types)

pflash_t *pflash_cfi01_register(hwaddr base,
DeviceState *qdev, const char *name,
hwaddr size,
BlockBackend *blk,
uint32_t sector_len, int nb_blocs,
int bank_width, uint16_t id0, uint16_t id1,
uint16_t id2, uint16_t id3, int be)
PFlashCFI01 *pflash_cfi01_register(hwaddr base,
DeviceState *qdev, const char *name,
hwaddr size,
BlockBackend *blk,
uint32_t sector_len, int nb_blocs,
int bank_width,
uint16_t id0, uint16_t id1,
uint16_t id2, uint16_t id3,
int be)
{
DeviceState *dev = qdev_create(NULL, TYPE_CFI_PFLASH01);

Expand All @@ -956,14 +959,14 @@ pflash_t *pflash_cfi01_register(hwaddr base,
return CFI_PFLASH01(dev);
}

MemoryRegion *pflash_cfi01_get_memory(pflash_t *fl)
MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl)
{
return &fl->mem;
}

static void postload_update_cb(void *opaque, int running, RunState state)
{
pflash_t *pfl = opaque;
PFlashCFI01 *pfl = opaque;

/* This is called after bdrv_invalidate_cache_all. */
qemu_del_vm_change_state_handler(pfl->vmstate);
Expand All @@ -975,7 +978,7 @@ static void postload_update_cb(void *opaque, int running, RunState state)

static int pflash_post_load(void *opaque, int version_id)
{
pflash_t *pfl = opaque;
PFlashCFI01 *pfl = opaque;

if (!pfl->ro) {
pfl->vmstate = qemu_add_vm_change_state_handler(postload_update_cb,
Expand Down
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