Skip to content

Commit

Permalink
cpu: Move cpu_exec_* to tcg_ops
Browse files Browse the repository at this point in the history
Signed-off-by: Eduardo Habkost <[email protected]>
[claudio: wrapped target code in CONFIG_TCG]
Signed-off-by: Claudio Fontana <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Alex Bennée <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>
  • Loading branch information
ehabkost authored and rth7680 committed Feb 5, 2021
1 parent ec62595 commit 48c1a3e
Show file tree
Hide file tree
Showing 25 changed files with 54 additions and 42 deletions.
12 changes: 6 additions & 6 deletions accel/tcg/cpu-exec.c
Original file line number Diff line number Diff line change
Expand Up @@ -262,17 +262,17 @@ static void cpu_exec_enter(CPUState *cpu)
{
CPUClass *cc = CPU_GET_CLASS(cpu);

if (cc->cpu_exec_enter) {
cc->cpu_exec_enter(cpu);
if (cc->tcg_ops.cpu_exec_enter) {
cc->tcg_ops.cpu_exec_enter(cpu);
}
}

static void cpu_exec_exit(CPUState *cpu)
{
CPUClass *cc = CPU_GET_CLASS(cpu);

if (cc->cpu_exec_exit) {
cc->cpu_exec_exit(cpu);
if (cc->tcg_ops.cpu_exec_exit) {
cc->tcg_ops.cpu_exec_exit(cpu);
}
}

Expand Down Expand Up @@ -655,8 +655,8 @@ static inline bool cpu_handle_interrupt(CPUState *cpu,
True when it is, and we should restart on a new TB,
and via longjmp via cpu_loop_exit. */
else {
if (cc->cpu_exec_interrupt &&
cc->cpu_exec_interrupt(cpu, interrupt_request)) {
if (cc->tcg_ops.cpu_exec_interrupt &&
cc->tcg_ops.cpu_exec_interrupt(cpu, interrupt_request)) {
if (need_replay_interrupt(interrupt_request)) {
replay_interrupt();
}
Expand Down
12 changes: 6 additions & 6 deletions include/hw/core/cpu.h
Original file line number Diff line number Diff line change
Expand Up @@ -99,6 +99,12 @@ typedef struct TcgCpuOperations {
*/
void (*synchronize_from_tb)(CPUState *cpu,
const struct TranslationBlock *tb);
/** @cpu_exec_enter: Callback for cpu_exec preparation */
void (*cpu_exec_enter)(CPUState *cpu);
/** @cpu_exec_exit: Callback for cpu_exec cleanup */
void (*cpu_exec_exit)(CPUState *cpu);
/** @cpu_exec_interrupt: Callback for processing interrupts in cpu_exec */
bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt_request);

} TcgCpuOperations;

Expand Down Expand Up @@ -168,9 +174,6 @@ typedef struct TcgCpuOperations {
* @gdb_get_dynamic_xml: Callback to return dynamically generated XML for the
* gdb stub. Returns a pointer to the XML contents for the specified XML file
* or NULL if the CPU doesn't have a dynamically generated content for it.
* @cpu_exec_enter: Callback for cpu_exec preparation.
* @cpu_exec_exit: Callback for cpu_exec cleanup.
* @cpu_exec_interrupt: Callback for processing interrupts in cpu_exec.
* @disas_set_info: Setup architecture specific components of disassembly info
* @adjust_watchpoint_address: Perform a target-specific adjustment to an
* address before attempting to match it against watchpoints.
Expand Down Expand Up @@ -233,9 +236,6 @@ struct CPUClass {
const char *gdb_core_xml_file;
gchar * (*gdb_arch_name)(CPUState *cpu);
const char * (*gdb_get_dynamic_xml)(CPUState *cpu, const char *xmlname);
void (*cpu_exec_enter)(CPUState *cpu);
void (*cpu_exec_exit)(CPUState *cpu);
bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt_request);

void (*disas_set_info)(CPUState *cpu, disassemble_info *info);
vaddr (*adjust_watchpoint_address)(CPUState *cpu, vaddr addr, int len);
Expand Down
2 changes: 1 addition & 1 deletion target/alpha/cpu.c
Original file line number Diff line number Diff line change
Expand Up @@ -218,7 +218,7 @@ static void alpha_cpu_class_init(ObjectClass *oc, void *data)
cc->class_by_name = alpha_cpu_class_by_name;
cc->has_work = alpha_cpu_has_work;
cc->do_interrupt = alpha_cpu_do_interrupt;
cc->cpu_exec_interrupt = alpha_cpu_exec_interrupt;
cc->tcg_ops.cpu_exec_interrupt = alpha_cpu_exec_interrupt;
cc->dump_state = alpha_cpu_dump_state;
cc->set_pc = alpha_cpu_set_pc;
cc->gdb_read_register = alpha_cpu_gdb_read_register;
Expand Down
2 changes: 1 addition & 1 deletion target/arm/cpu.c
Original file line number Diff line number Diff line change
Expand Up @@ -2256,7 +2256,6 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data)

cc->class_by_name = arm_cpu_class_by_name;
cc->has_work = arm_cpu_has_work;
cc->cpu_exec_interrupt = arm_cpu_exec_interrupt;
cc->dump_state = arm_cpu_dump_state;
cc->set_pc = arm_cpu_set_pc;
cc->gdb_read_register = arm_cpu_gdb_read_register;
Expand All @@ -2278,6 +2277,7 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data)
cc->disas_set_info = arm_disas_set_info;
#ifdef CONFIG_TCG
cc->tcg_ops.initialize = arm_translate_init;
cc->tcg_ops.cpu_exec_interrupt = arm_cpu_exec_interrupt;
cc->tcg_ops.synchronize_from_tb = arm_cpu_synchronize_from_tb;
cc->tlb_fill = arm_cpu_tlb_fill;
cc->debug_excp_handler = arm_debug_excp_handler;
Expand Down
5 changes: 4 additions & 1 deletion target/arm/cpu64.c
Original file line number Diff line number Diff line change
Expand Up @@ -805,7 +805,10 @@ static void aarch64_cpu_class_init(ObjectClass *oc, void *data)
{
CPUClass *cc = CPU_CLASS(oc);

cc->cpu_exec_interrupt = arm_cpu_exec_interrupt;
#ifdef CONFIG_TCG
cc->tcg_ops.cpu_exec_interrupt = arm_cpu_exec_interrupt;
#endif /* CONFIG_TCG */

cc->gdb_read_register = aarch64_cpu_gdb_read_register;
cc->gdb_write_register = aarch64_cpu_gdb_write_register;
cc->gdb_num_core_regs = 34;
Expand Down
7 changes: 6 additions & 1 deletion target/arm/cpu_tcg.c
Original file line number Diff line number Diff line change
Expand Up @@ -15,6 +15,7 @@
/* CPU models. These are not needed for the AArch64 linux-user build. */
#if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64)

#ifdef CONFIG_TCG
static bool arm_v7m_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
{
CPUClass *cc = CPU_GET_CLASS(cs);
Expand All @@ -38,6 +39,7 @@ static bool arm_v7m_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
}
return ret;
}
#endif /* CONFIG_TCG */

static void arm926_initfn(Object *obj)
{
Expand Down Expand Up @@ -668,7 +670,10 @@ static void arm_v7m_class_init(ObjectClass *oc, void *data)
cc->do_interrupt = arm_v7m_cpu_do_interrupt;
#endif

cc->cpu_exec_interrupt = arm_v7m_cpu_exec_interrupt;
#ifdef CONFIG_TCG
cc->tcg_ops.cpu_exec_interrupt = arm_v7m_cpu_exec_interrupt;
#endif /* CONFIG_TCG */

cc->gdb_core_xml_file = "arm-m-profile.xml";
}

Expand Down
2 changes: 1 addition & 1 deletion target/avr/cpu.c
Original file line number Diff line number Diff line change
Expand Up @@ -199,7 +199,7 @@ static void avr_cpu_class_init(ObjectClass *oc, void *data)

cc->has_work = avr_cpu_has_work;
cc->do_interrupt = avr_cpu_do_interrupt;
cc->cpu_exec_interrupt = avr_cpu_exec_interrupt;
cc->tcg_ops.cpu_exec_interrupt = avr_cpu_exec_interrupt;
cc->dump_state = avr_cpu_dump_state;
cc->set_pc = avr_cpu_set_pc;
cc->memory_rw_debug = avr_cpu_memory_rw_debug;
Expand Down
2 changes: 1 addition & 1 deletion target/cris/cpu.c
Original file line number Diff line number Diff line change
Expand Up @@ -269,7 +269,7 @@ static void cris_cpu_class_init(ObjectClass *oc, void *data)
cc->class_by_name = cris_cpu_class_by_name;
cc->has_work = cris_cpu_has_work;
cc->do_interrupt = cris_cpu_do_interrupt;
cc->cpu_exec_interrupt = cris_cpu_exec_interrupt;
cc->tcg_ops.cpu_exec_interrupt = cris_cpu_exec_interrupt;
cc->dump_state = cris_cpu_dump_state;
cc->set_pc = cris_cpu_set_pc;
cc->gdb_read_register = cris_cpu_gdb_read_register;
Expand Down
2 changes: 1 addition & 1 deletion target/hppa/cpu.c
Original file line number Diff line number Diff line change
Expand Up @@ -141,7 +141,7 @@ static void hppa_cpu_class_init(ObjectClass *oc, void *data)
cc->class_by_name = hppa_cpu_class_by_name;
cc->has_work = hppa_cpu_has_work;
cc->do_interrupt = hppa_cpu_do_interrupt;
cc->cpu_exec_interrupt = hppa_cpu_exec_interrupt;
cc->tcg_ops.cpu_exec_interrupt = hppa_cpu_exec_interrupt;
cc->dump_state = hppa_cpu_dump_state;
cc->set_pc = hppa_cpu_set_pc;
cc->tcg_ops.synchronize_from_tb = hppa_cpu_synchronize_from_tb;
Expand Down
6 changes: 3 additions & 3 deletions target/i386/tcg/tcg-cpu.c
Original file line number Diff line number Diff line change
Expand Up @@ -60,10 +60,10 @@ static void x86_cpu_synchronize_from_tb(CPUState *cs,
void tcg_cpu_common_class_init(CPUClass *cc)
{
cc->do_interrupt = x86_cpu_do_interrupt;
cc->cpu_exec_interrupt = x86_cpu_exec_interrupt;
cc->tcg_ops.cpu_exec_interrupt = x86_cpu_exec_interrupt;
cc->tcg_ops.synchronize_from_tb = x86_cpu_synchronize_from_tb;
cc->cpu_exec_enter = x86_cpu_exec_enter;
cc->cpu_exec_exit = x86_cpu_exec_exit;
cc->tcg_ops.cpu_exec_enter = x86_cpu_exec_enter;
cc->tcg_ops.cpu_exec_exit = x86_cpu_exec_exit;
cc->tcg_ops.initialize = tcg_x86_init;
cc->tlb_fill = x86_cpu_tlb_fill;
#ifndef CONFIG_USER_ONLY
Expand Down
2 changes: 1 addition & 1 deletion target/lm32/cpu.c
Original file line number Diff line number Diff line change
Expand Up @@ -223,7 +223,7 @@ static void lm32_cpu_class_init(ObjectClass *oc, void *data)
cc->class_by_name = lm32_cpu_class_by_name;
cc->has_work = lm32_cpu_has_work;
cc->do_interrupt = lm32_cpu_do_interrupt;
cc->cpu_exec_interrupt = lm32_cpu_exec_interrupt;
cc->tcg_ops.cpu_exec_interrupt = lm32_cpu_exec_interrupt;
cc->dump_state = lm32_cpu_dump_state;
cc->set_pc = lm32_cpu_set_pc;
cc->gdb_read_register = lm32_cpu_gdb_read_register;
Expand Down
2 changes: 1 addition & 1 deletion target/m68k/cpu.c
Original file line number Diff line number Diff line change
Expand Up @@ -466,7 +466,7 @@ static void m68k_cpu_class_init(ObjectClass *c, void *data)
cc->class_by_name = m68k_cpu_class_by_name;
cc->has_work = m68k_cpu_has_work;
cc->do_interrupt = m68k_cpu_do_interrupt;
cc->cpu_exec_interrupt = m68k_cpu_exec_interrupt;
cc->tcg_ops.cpu_exec_interrupt = m68k_cpu_exec_interrupt;
cc->dump_state = m68k_cpu_dump_state;
cc->set_pc = m68k_cpu_set_pc;
cc->gdb_read_register = m68k_cpu_gdb_read_register;
Expand Down
2 changes: 1 addition & 1 deletion target/microblaze/cpu.c
Original file line number Diff line number Diff line change
Expand Up @@ -366,7 +366,7 @@ static void mb_cpu_class_init(ObjectClass *oc, void *data)
cc->has_work = mb_cpu_has_work;
cc->do_interrupt = mb_cpu_do_interrupt;
cc->do_unaligned_access = mb_cpu_do_unaligned_access;
cc->cpu_exec_interrupt = mb_cpu_exec_interrupt;
cc->tcg_ops.cpu_exec_interrupt = mb_cpu_exec_interrupt;
cc->dump_state = mb_cpu_dump_state;
cc->set_pc = mb_cpu_set_pc;
cc->tcg_ops.synchronize_from_tb = mb_cpu_synchronize_from_tb;
Expand Down
2 changes: 1 addition & 1 deletion target/mips/cpu.c
Original file line number Diff line number Diff line change
Expand Up @@ -677,7 +677,6 @@ static void mips_cpu_class_init(ObjectClass *c, void *data)
cc->class_by_name = mips_cpu_class_by_name;
cc->has_work = mips_cpu_has_work;
cc->do_interrupt = mips_cpu_do_interrupt;
cc->cpu_exec_interrupt = mips_cpu_exec_interrupt;
cc->dump_state = mips_cpu_dump_state;
cc->set_pc = mips_cpu_set_pc;
cc->gdb_read_register = mips_cpu_gdb_read_register;
Expand All @@ -691,6 +690,7 @@ static void mips_cpu_class_init(ObjectClass *c, void *data)
cc->disas_set_info = mips_cpu_disas_set_info;
#ifdef CONFIG_TCG
cc->tcg_ops.initialize = mips_tcg_init;
cc->tcg_ops.cpu_exec_interrupt = mips_cpu_exec_interrupt;
cc->tcg_ops.synchronize_from_tb = mips_cpu_synchronize_from_tb;
cc->tlb_fill = mips_cpu_tlb_fill;
#endif
Expand Down
2 changes: 1 addition & 1 deletion target/nios2/cpu.c
Original file line number Diff line number Diff line change
Expand Up @@ -222,7 +222,7 @@ static void nios2_cpu_class_init(ObjectClass *oc, void *data)
cc->class_by_name = nios2_cpu_class_by_name;
cc->has_work = nios2_cpu_has_work;
cc->do_interrupt = nios2_cpu_do_interrupt;
cc->cpu_exec_interrupt = nios2_cpu_exec_interrupt;
cc->tcg_ops.cpu_exec_interrupt = nios2_cpu_exec_interrupt;
cc->dump_state = nios2_cpu_dump_state;
cc->set_pc = nios2_cpu_set_pc;
cc->disas_set_info = nios2_cpu_disas_set_info;
Expand Down
2 changes: 1 addition & 1 deletion target/openrisc/cpu.c
Original file line number Diff line number Diff line change
Expand Up @@ -187,7 +187,7 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void *data)
cc->class_by_name = openrisc_cpu_class_by_name;
cc->has_work = openrisc_cpu_has_work;
cc->do_interrupt = openrisc_cpu_do_interrupt;
cc->cpu_exec_interrupt = openrisc_cpu_exec_interrupt;
cc->tcg_ops.cpu_exec_interrupt = openrisc_cpu_exec_interrupt;
cc->dump_state = openrisc_cpu_dump_state;
cc->set_pc = openrisc_cpu_set_pc;
cc->gdb_read_register = openrisc_cpu_gdb_read_register;
Expand Down
16 changes: 10 additions & 6 deletions target/ppc/translate_init.c.inc
Original file line number Diff line number Diff line change
Expand Up @@ -10700,6 +10700,7 @@ static void ppc_cpu_reset(DeviceState *dev)
}

#ifndef CONFIG_USER_ONLY

static bool ppc_cpu_is_big_endian(CPUState *cs)
{
PowerPCCPU *cpu = POWERPC_CPU(cs);
Expand All @@ -10710,6 +10711,7 @@ static bool ppc_cpu_is_big_endian(CPUState *cs)
return !msr_le;
}

#ifdef CONFIG_TCG
static void ppc_cpu_exec_enter(CPUState *cs)
{
PowerPCCPU *cpu = POWERPC_CPU(cs);
Expand All @@ -10731,7 +10733,9 @@ static void ppc_cpu_exec_exit(CPUState *cs)
vhc->cpu_exec_exit(cpu->vhyp, cpu);
}
}
#endif
#endif /* CONFIG_TCG */

#endif /* !CONFIG_USER_ONLY */

static void ppc_cpu_instance_init(Object *obj)
{
Expand Down Expand Up @@ -10842,7 +10846,6 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data)
cc->class_by_name = ppc_cpu_class_by_name;
cc->has_work = ppc_cpu_has_work;
cc->do_interrupt = ppc_cpu_do_interrupt;
cc->cpu_exec_interrupt = ppc_cpu_exec_interrupt;
cc->dump_state = ppc_cpu_dump_state;
cc->dump_statistics = ppc_cpu_dump_statistics;
cc->set_pc = ppc_cpu_set_pc;
Expand Down Expand Up @@ -10879,12 +10882,13 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data)
#endif
#ifdef CONFIG_TCG
cc->tcg_ops.initialize = ppc_translate_init;
cc->tcg_ops.cpu_exec_interrupt = ppc_cpu_exec_interrupt;
cc->tlb_fill = ppc_cpu_tlb_fill;
#endif
#ifndef CONFIG_USER_ONLY
cc->cpu_exec_enter = ppc_cpu_exec_enter;
cc->cpu_exec_exit = ppc_cpu_exec_exit;
#endif
cc->tcg_ops.cpu_exec_enter = ppc_cpu_exec_enter;
cc->tcg_ops.cpu_exec_exit = ppc_cpu_exec_exit;
#endif /* !CONFIG_USER_ONLY */
#endif /* CONFIG_TCG */

cc->disas_set_info = ppc_disas_set_info;

Expand Down
2 changes: 1 addition & 1 deletion target/riscv/cpu.c
Original file line number Diff line number Diff line change
Expand Up @@ -594,7 +594,7 @@ static void riscv_cpu_class_init(ObjectClass *c, void *data)
cc->class_by_name = riscv_cpu_class_by_name;
cc->has_work = riscv_cpu_has_work;
cc->do_interrupt = riscv_cpu_do_interrupt;
cc->cpu_exec_interrupt = riscv_cpu_exec_interrupt;
cc->tcg_ops.cpu_exec_interrupt = riscv_cpu_exec_interrupt;
cc->dump_state = riscv_cpu_dump_state;
cc->set_pc = riscv_cpu_set_pc;
cc->tcg_ops.synchronize_from_tb = riscv_cpu_synchronize_from_tb;
Expand Down
2 changes: 1 addition & 1 deletion target/rx/cpu.c
Original file line number Diff line number Diff line change
Expand Up @@ -187,7 +187,7 @@ static void rx_cpu_class_init(ObjectClass *klass, void *data)
cc->class_by_name = rx_cpu_class_by_name;
cc->has_work = rx_cpu_has_work;
cc->do_interrupt = rx_cpu_do_interrupt;
cc->cpu_exec_interrupt = rx_cpu_exec_interrupt;
cc->tcg_ops.cpu_exec_interrupt = rx_cpu_exec_interrupt;
cc->dump_state = rx_cpu_dump_state;
cc->set_pc = rx_cpu_set_pc;
cc->tcg_ops.synchronize_from_tb = rx_cpu_synchronize_from_tb;
Expand Down
2 changes: 1 addition & 1 deletion target/s390x/cpu.c
Original file line number Diff line number Diff line change
Expand Up @@ -508,7 +508,7 @@ static void s390_cpu_class_init(ObjectClass *oc, void *data)
cc->get_crash_info = s390_cpu_get_crash_info;
cc->write_elf64_note = s390_cpu_write_elf64_note;
#ifdef CONFIG_TCG
cc->cpu_exec_interrupt = s390_cpu_exec_interrupt;
cc->tcg_ops.cpu_exec_interrupt = s390_cpu_exec_interrupt;
cc->debug_excp_handler = s390x_cpu_debug_excp_handler;
cc->do_unaligned_access = s390x_cpu_do_unaligned_access;
#endif
Expand Down
2 changes: 1 addition & 1 deletion target/sh4/cpu.c
Original file line number Diff line number Diff line change
Expand Up @@ -220,7 +220,7 @@ static void superh_cpu_class_init(ObjectClass *oc, void *data)
cc->class_by_name = superh_cpu_class_by_name;
cc->has_work = superh_cpu_has_work;
cc->do_interrupt = superh_cpu_do_interrupt;
cc->cpu_exec_interrupt = superh_cpu_exec_interrupt;
cc->tcg_ops.cpu_exec_interrupt = superh_cpu_exec_interrupt;
cc->dump_state = superh_cpu_dump_state;
cc->set_pc = superh_cpu_set_pc;
cc->tcg_ops.synchronize_from_tb = superh_cpu_synchronize_from_tb;
Expand Down
2 changes: 1 addition & 1 deletion target/sparc/cpu.c
Original file line number Diff line number Diff line change
Expand Up @@ -864,7 +864,7 @@ static void sparc_cpu_class_init(ObjectClass *oc, void *data)
cc->parse_features = sparc_cpu_parse_features;
cc->has_work = sparc_cpu_has_work;
cc->do_interrupt = sparc_cpu_do_interrupt;
cc->cpu_exec_interrupt = sparc_cpu_exec_interrupt;
cc->tcg_ops.cpu_exec_interrupt = sparc_cpu_exec_interrupt;
cc->dump_state = sparc_cpu_dump_state;
#if !defined(TARGET_SPARC64) && !defined(CONFIG_USER_ONLY)
cc->memory_rw_debug = sparc_cpu_memory_rw_debug;
Expand Down
2 changes: 1 addition & 1 deletion target/tilegx/cpu.c
Original file line number Diff line number Diff line change
Expand Up @@ -148,7 +148,7 @@ static void tilegx_cpu_class_init(ObjectClass *oc, void *data)
cc->class_by_name = tilegx_cpu_class_by_name;
cc->has_work = tilegx_cpu_has_work;
cc->do_interrupt = tilegx_cpu_do_interrupt;
cc->cpu_exec_interrupt = tilegx_cpu_exec_interrupt;
cc->tcg_ops.cpu_exec_interrupt = tilegx_cpu_exec_interrupt;
cc->dump_state = tilegx_cpu_dump_state;
cc->set_pc = tilegx_cpu_set_pc;
cc->tlb_fill = tilegx_cpu_tlb_fill;
Expand Down
2 changes: 1 addition & 1 deletion target/unicore32/cpu.c
Original file line number Diff line number Diff line change
Expand Up @@ -132,7 +132,7 @@ static void uc32_cpu_class_init(ObjectClass *oc, void *data)
cc->class_by_name = uc32_cpu_class_by_name;
cc->has_work = uc32_cpu_has_work;
cc->do_interrupt = uc32_cpu_do_interrupt;
cc->cpu_exec_interrupt = uc32_cpu_exec_interrupt;
cc->tcg_ops.cpu_exec_interrupt = uc32_cpu_exec_interrupt;
cc->dump_state = uc32_cpu_dump_state;
cc->set_pc = uc32_cpu_set_pc;
cc->tlb_fill = uc32_cpu_tlb_fill;
Expand Down
2 changes: 1 addition & 1 deletion target/xtensa/cpu.c
Original file line number Diff line number Diff line change
Expand Up @@ -195,7 +195,7 @@ static void xtensa_cpu_class_init(ObjectClass *oc, void *data)
cc->class_by_name = xtensa_cpu_class_by_name;
cc->has_work = xtensa_cpu_has_work;
cc->do_interrupt = xtensa_cpu_do_interrupt;
cc->cpu_exec_interrupt = xtensa_cpu_exec_interrupt;
cc->tcg_ops.cpu_exec_interrupt = xtensa_cpu_exec_interrupt;
cc->dump_state = xtensa_cpu_dump_state;
cc->set_pc = xtensa_cpu_set_pc;
cc->gdb_read_register = xtensa_cpu_gdb_read_register;
Expand Down

0 comments on commit 48c1a3e

Please sign in to comment.